R5F2L3ACBNFP datasheet(85/848 Pages) RENESAS

85 / 848 page

5. Resets

REJ09B0441-0010 Rev.0.10

Jul 30, 2008

Page 49 of 809

Under development Preliminary specification

Specifications in this manual are tentative and subject to change.

R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,

R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group

Table 5.2 shows the Pin Status while RESET Pin Level is Low. Figure 5.2 shows the CPU Register Status after Reset

and Figure 5.3 shows the Reset Sequence.

Figure 5.2

CPU Register Status after Reset

Table 5.2

Pin Status while RESET Pin Level is Low

Pin Name

Pin Status

P0 to P13

High impedance

WKUP0

High impedance

XCIN, XCOUT

Undefined

VL1 to LVL4

High impedance

b19

Interrupt table register (INTB)

Program counter (PC)

User stack pointer (USP)

Interrupt stack pointer (ISP)

Static base register (SB)

Content of addresses 0FFFEh to 0FFFCh

Flag register (FLG)

IPL

b15

0000h

Data register (R0)

Data register (R1)

Data register (R2)

Data register (R3)

Address register (A0)

Address register (A1)

Frame base register (FB)

00000h

0000h

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