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R5F2L3ACBNFP Datasheet(PDF) 22 Page - Renesas Technology Corp |
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R5F2L3ACBNFP Datasheet(HTML) 22 Page - Renesas Technology Corp |
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22 / 848 page ![]() A - 15 27. Synchronous Serial Communication Unit (SSU) ........................................................................ 563 27.1 Introduction ........................................................................................................................................... 563 27.2 Registers ................................................................................................................................................ 565 27.2.1 Module Standby Control Register (MSTCR) ................................................................................... 565 27.2.2 SSU/IIC Pin Select Register (SSUIICSR) ........................................................................................ 566 27.2.3 SS Bit Counter Register (SSBR) ...................................................................................................... 567 27.2.4 SS Transmit Data Register (SSTDR) ................................................................................................ 567 27.2.5 SS Receive Data Register (SSRDR) ................................................................................................. 568 27.2.6 SS Control Register H (SSCRH) ...................................................................................................... 568 27.2.7 SS Control Register L (SSCRL) ....................................................................................................... 569 27.2.8 SS Mode Register (SSMR) ............................................................................................................... 570 27.2.9 SS Enable Register (SSER) .............................................................................................................. 571 27.2.10 SS Status Register (SSSR) ................................................................................................................ 572 27.2.11 SS Mode Register 2 (SSMR2) .......................................................................................................... 573 27.3 Common Items for Multiple Modes ...................................................................................................... 574 27.3.1 Transfer Clock .................................................................................................................................. 574 27.3.2 SS Shift Register (SSTRSR) ............................................................................................................. 576 27.3.3 Interrupt Requests ............................................................................................................................. 577 27.3.4 Communication Modes and Pin Functions ....................................................................................... 578 27.4 Clock Synchronous Communication Mode .......................................................................................... 579 27.4.1 Initialization in Clock Synchronous Communication Mode ............................................................ 579 27.4.2 Data Transmission ............................................................................................................................ 580 27.4.3 Data Reception .................................................................................................................................. 582 27.5 Operation in 4-Wire Bus Communication Mode .................................................................................. 586 27.5.1 Initialization in 4-Wire Bus Communication Mode ......................................................................... 587 27.5.2 Data Transmission ............................................................................................................................ 588 27.5.3 Data Reception .................................................................................................................................. 590 27.5.4 SCS Pin Control and Arbitration ...................................................................................................... 592 27.6 Notes on Synchronous Serial Communication Unit .............................................................................. 593 28. I2C bus Interface ......................................................................................................................... 594 28.1 Introduction ........................................................................................................................................... 594 28.2 Registers ................................................................................................................................................ 597 28.2.1 Module Standby Control Register (MSTCR) ................................................................................... 597 28.2.2 SSU/IIC Pin Select Register (SSUIICSR) ........................................................................................ 597 28.2.3 IIC bus Transmit Data Register (ICDRT) ......................................................................................... 598 28.2.4 IIC bus Receive Data Register (ICDRR) .......................................................................................... 598 28.2.5 IIC bus Control Register 1 (ICCR1) ................................................................................................. 599 28.2.6 IIC bus Control Register 2 (ICCR2) ................................................................................................. 600 28.2.7 IIC bus Mode Register (ICMR) ........................................................................................................ 601 28.2.8 IIC bus Interrupt Enable Register (ICIER) ....................................................................................... 602 28.2.9 IIC bus Status Register (ICSR) ......................................................................................................... 603 28.2.10 Slave Address Register (SAR) .......................................................................................................... 604 28.2.11 IIC bus Shift Register (ICDRS) ........................................................................................................ 604 28.3 Common Items for Multiple Modes ...................................................................................................... 605 28.3.1 Transfer Clock .................................................................................................................................. 605 28.3.2 Interrupt Requests ............................................................................................................................. 606 28.4 I2C bus Interface Mode ......................................................................................................................... 607 28.4.1 I2C bus Format ................................................................................................................................. 607 |
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