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R5F2L3ACBNFP Datasheet(PDF) 88 Page - Renesas Technology Corp

Part # R5F2L3ACBNFP
Description  RENESAS MCU R8C FAMILY / R8C/Lx SERIES
PDF  848 Pages
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Manufacturer  RENESAS [Renesas Technology Corp]
Direct Link  http://www.renesas.com
Logo RENESAS - Renesas Technology Corp

R5F2L3ACBNFP Datasheet(HTML) 88 Page - Renesas Technology Corp

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5. Resets
REJ09B0441-0010 Rev.0.10
Jul 30, 2008
Page 52 of 809
Under development Preliminary specification
Specifications in this manual are tentative and subject to change.
R8C/L35A Group, R8C/L36A Group, R8C/L38A Group, R8C/L3AA Group,
R8C/L35B Group, R8C/L36B Group, R8C/L38B Group, R8C/L3AB Group
5.1.3
Option Function Select Register (OFS)
Notes:
1. If the block including the OFS register is erased, the OFS register value is set to FFh.
2. The same level of the voltage detection 0 level selected by bits VDSEL0 and VDESL1 is set in both functions of
voltage monitor 0 reset and power-on reset.
3. To use power-on reset, set the LVDAS bit to 0 (voltage monitor 0 reset enabled after reset).
The OFS register is allocated in the flash memory. Write to this register with a program.
After writing, do not write additions to this register.
LVDAS Bit (Voltage Detection 0 Circuit Start Bit)
The Vdet0 voltage to be monitored by the voltage detection 0 circuit is selected by bits VDSEL0 and VDSEL1.
Address 0FFFFh
Bit
b7
b6b5b4
b3b2
b1b0
Symbol CSPROINI
LVDAS
VDSEL1 VDSEL0 ROMCP1 ROMCR
—
WDTON
When shipping
1
111
111
1
(Note 1)
Bit
Symbol
Bit Name
Function
R/W
b0
WDTON
Watchdog timer start select bit
0: Watchdog timer automatically starts after reset
1: Watchdog timer is stopped after reset
R/W
b1
—
Reserved bit
Set to 1.
R/W
b2
ROMCR
ROM code protect disable bit
0: ROM code protect disabled
1: ROMCP1 bit enabled
R/W
b3
ROMCP1 ROM code protect bit
0: ROM code protect enabled
1: ROM code protect disabled
R/W
b4
VDSEL0
Voltage detection 0 level select bit (2)
b5 b4
0 0: 3.80 V selected (Vdet0_3)
0 1: 2.85 V selected (Vdet0_2)
1 0: 2.35 V selected (Vdet0_1)
1 1: 1.90 V selected (Vdet0_0)
R/W
b5
VDSEL1
R/W
b6
LVDAS
Voltage detection 0 circuit start bit (3)
0: Voltage monitor 0 reset enabled after reset
1: Voltage monitor 0 reset disabled after reset
R/W
b7
CSPROINI Count source protection mode
after reset select bit
0: Count source protection mode enabled after reset
1: Count source protection mode disabled after reset
R/W



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