TS80C52X2-VCKB datasheet(37/54 Pages) TEMIC

37 / 54 page

Rev. B - Jan. 25, 1999

Preliminary

TS80C52X2

The encryption array cannot be directly verified. Verification of the encryption array is done by observing that the

code array is well encrypted.

Figure 12. Programming and Verification Signal’s Waveform

8.4 EPROM Erasure (Windowed Packages Only)

Erasing the EPROM erases the code array, the encryption array and the lock bits returning the parts to full

functionality.

Erasure leaves all the EPROM cells in a 1’s state (FF).

8.4.1 Erasure Characteristics

The recommended erasure procedure is exposure to ultraviolet light (at 2537 Å) to an integrated dose at least 15

W-sec/cm2. Exposing the EPROM to an ultraviolet lamp of 12,000

µW/cm2 rating for 30 minutes, at a distance

of about 25 mm, should be sufficient.

Erasure of the EPROM begins to occur when the chip is exposed to light with wavelength shorter than approximately

4,000 Å. Since sunlight and fluorescent lighting have wavelengths in this range, exposure to these light sources

over an extended time (about 1 week in sunlight, or 3 years in room-level fluorescent lighting) could cause

inadvertent erasure. If an application subjects the device to this type of exposure, it is suggested that an opaque

label be placed over the window.

Control signals

Data In

ALE/PROG

A0-A12

Programming Cycle

100

µs

D0-D7

EA/VPP

Data Out

Read/Verify Cycle

12.75V

TS80C52X2-VCKB Datasheet(PDF) 37 Page - TEMIC Semiconductors