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M68HC08 Datasheet(PDF) 75 Page - Freescale Semiconductor, Inc |
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M68HC08 Datasheet(HTML) 75 Page - Freescale Semiconductor, Inc |
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75 / 188 page ![]() Internal Clock Generator Module (ICG) Functional Description MC68HC908RF2 — Rev. 4.0 Data Sheet MOTOROLA Internal Clock Generator Module (ICG) 75 Figure 6-5. Clock Selection Circuit Block Diagram 6.3.5.2 Clock Switching Circuit To robustly switch between the internal clock (ICLK) and the external clock (ECLK), the switch assumes the clocks are completely asynchronous, so a synchronizing circuit is required to make the transition (see Figure 6-6). When the clock select bit is changed, the switch will continue to operate off the original clock for between 1 and 2 cycles as the select input transitions through one side of the synchronizer. Next, the output will be held low for between 1 and 2 cycles of the new clock as the select input transitions through the other side. Then the output starts switching at the new clock’s frequency. This transition guarantees that no glitches will be seen on the output even though the select input may change asynchronously to the clocks. The unpredictably of the transition period is a necessary result of the asynchronicity. Figure 6-6. Synchronizing Clock Switcher Circuit Diagram ICLK ECLK IOFF EOFF FORCE_I FORCE_E SELECT OUTPUT SYNCHRONIZING CLOCK SWITCHER DIV2 NAME NAME NAME TOP LEVEL SIGNAL REGISTER BIT MODULE SIGNAL RESET ECLK EOFF ICLK IOFF VSS CS CGMOUT CGMXCLK FORCE_I ECLK EOFF OUTPUT DQ CK DFF QB SELECT ICLK DQ CK DFF QB DQ CK DFF QB DQ CK DFF QB FORCE_E FORCE_I = Force internal; reset condition FORCE_E = Force external IOFF Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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