TMS320C44 datasheet(11/42 Pages) TI

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TMS320C44

DIGITAL SIGNAL PROCESSOR

SPRS031B – AUGUST 1994 – REVISED DECEMBER 1995

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

memory map

Figure 1 shows the memory map for the ’320C44. Refer to the

TMS320C4x User’s Guide (literature number

SPRU063B) for a detailed description of this memory mapping.

1 M

13 M

2 G – 16 M

00000 0000h

00000 0FFFh

00000 1000h

0000F FFFFh

00010 0000h

00010 00FFh

00010 0100h

0001F FFFFh

00020 0000h

0002F F7FFh

0002F F800h

0002F FBFFh

0002F FC00h

0002F FFFFh

00030 0000h

000FF FFFFh

0100 0000h

7FFF FFFFh

8000 0000h

80FF FFFh

8100 0000

FFFF FFFFh

Accessible Local Bus

(External)

Peripherals (Internal)

Reserved

1K RAM BLK 0 (Internal)

1K RAM BLK 1 (Internal)

Local Bus

(External)

Local Bus

(alias region, see Figure 2)

Global Bus

(External)

Global Bus

(alias region, see Figure 2)

(a) INTERNAL ROM DISABLED

(ROMEN = 0)

Microprocessor Mode

Reserved

Peripherals (Internal)

Reserved

1K RAM BLK 0 (Internal)

1K RAM BLK 1 (Internal)

Local Bus

(External)

Local Bus

(alias region, see Figure 2)

Global Bus

(External)

Global Bus

(alias region, see Figure 2)

(b) INTERNAL ROM ENABLED

(ROMEN = 1)

Microcomputer Mode

Boot-Loader ROM (Internal)

16 M

Figure 1. Memory Map for the ’320C44

TMS320C44 Datasheet(PDF) 11 Page - Texas Instruments

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