TMS320C44 datasheet(19/42 Pages) TI

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TMS320C44

DIGITAL SIGNAL PROCESSOR

SPRS031B – AUGUST 1994 – REVISED DECEMBER 1995

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

PARAMETER MEASUREMENT INFORMATION

Tester Pin

Electronics

VLoad

IOL

IOH

Output

Under

Test

Where: IOL

= 2 mA (all outputs)

IOH

= 300

µA (all outputs)

VLOAD = 2.15 V

= 80 pF typical load-circuit capacitance

Figure 5. Test Load Circuit

signal transition levels

TTL-level outputs are driven to a minimum logic-high level of 2.4 V and to a maximum logic-low level of 0.6 V.

Output transition times are specified as follows:

D For a low-to-high transition, the level at which the output is said to be no longer low is 1 V and the level at

which the output is said to be high is 2 V.

D For a high-to-low transition on a TTL-compatible output signal, the level at which the output is said to be

no longer high is 2 V and the level at which the output is said to be low is 1 V.

0.6 V

1 V

2 V

2.4 V

Figure 6. TTL-Level Outputs

Transition times for TTL-compatible inputs are specified as follows:

D For a low-to-high transition on an input signal, the level at which the input is said to be no longer low is

0.92 V (10%) and the level at which the input is said to be high is 1.88 V (90%).

D For a high-to-low transition on an input signal, the level at which the input is said to be no longer high is

1.88 V (90%) and the level at which the input is said to be low is 0.92 V (10%).

1.88 V (90%)

0.92 V (10%)

2 V

0.8 V

Figure 7. TTL-Level Inputs

TMS320C44 Datasheet(PDF) 19 Page - Texas Instruments

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