TMS320VC549 datasheet(100/111 Pages) TI

100 / 111 page

TMS320C54x, TMS320LC54x, TMS320VC54x

FIXED-POINT DIGITAL SIGNAL PROCESSORS

SPRS039C – FEBRUARY 1996 – REVISED DECEMBER 1999

100

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

serial-port transmit timing in TDM mode (continued)

timing requirements for serial-port transmit in TDM mode [H = 0.5tc(CO)] (see Figure 39)

’C54x-40

’LC54x-40

’LC54x-50

’54X–66

UNIT

MIN

MAX

MIN

MAX

tc(SCK)

Cycle time, serial-port clock

8H†

‡

16H†

‡

tf(SCK)

Fall time, serial-port clock

tr(SCK)

Rise time, serial-port clock

tw(SCK)

Pulse duration, serial-port clock low/high

4H†

8H†

† When SCK is generated internally, this value is typical.

‡ The serial-port design is fully static and, therefore, can operate with tc(SCK) approaching 1. It is characterized approaching an input frequency

of 0 Hz but tested as a much higher frequency to minimize test time.

B12

B13

B14

tw(SCK)

th(TCH-TDV)

td(TCH-TFV)

TFRM

TADD

TDAT

TCLK

B15

tc(SCK)

td(TC-TDV)

th(TCH-TDV)

td(TCH-TFV)

td(TC-TDV)

tr(SCK)

tf(SCK)

Figure 39. Serial-Port Transmit Timing in TDM Mode

TMS320VC549 Datasheet(PDF) 100 Page - Texas Instruments

TMS320VC549 Datasheet(HTML) 100 Page - Texas Instruments

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31 32 33 34 35 36 37 38 39 40 41 42 43 44 45 46 47 48 49 50 51 52 53 54 55 56 57 58 59 60 61 62 63 64 65 66 67 68 69 70 71 72 73 74 75 76 77 78 79 80 81 82 83 84 85 86 87 88 89 90 91 92 93 94 95 96 97 98 99 100 ...More

Datasheet Download

Link URL