TMS320VC549 datasheet(27/111 Pages) TI

27 / 111 page

TMS320C54x, TMS320LC54x, TMS320VC54x

FIXED-POINT DIGITAL SIGNAL PROCESSORS

SPRS039C – FEBRUARY 1996 – REVISED DECEMBER 1999

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

extended program memory (’548 and ’549 only) (continued)

D Six new instructions for addressing extended program memory space:

–

FB[D] — Far branch

–

FBACC[D] — Far branch to the location specified by the value in accumulator A or accumulator B

–

FCALA[D] — Far call to the location specified by the value in accumulator A or accumulator B

–

FCALL[D] — Far call

–

FRET[D] — Far return

–

FRETE[D] — Far return with interrupts enabled

D Two ’54x instructions are extended to use the 23 bits in the ’548 and ’549 devices:

–

READA — Read program memory addressed by accumulator A and store in data memory

–

WRITA — Write data to program memory addressed by accumulator A

For more information on these six new instructions and the two extended instructions, refer to the instruction

set summary table in this data sheet and to the

TMS320C54x DSP Reference Set, Volume 2, Mnemonic

Instruction Set, literature number SPRU172. And for more information on extended program memory, refer to

the

TMS320C54x DSP Reference Set, Volume 1, CPU and Peripherals, literature number SPRU131.

data memory

The data memory space on the ’54x device addresses contains up to 64K of 16-bit words. The ’devices

automatically access the on-chip RAM when addressing within its bounds. When an address is generated

outside the RAM bounds, the device automatically generates an external access.

The advantages of operating from on-chip memory are as follows:

D Higher performance because no wait states are required

D Higher performance because of better flow within the pipeline of the CALU

D Lower cost than external memory

D Lower power than external memory

The advantage of operating from off-chip memory is the ability to access a larger address space.

bootloader

A bootloader is available in the standard ’54x on-chip ROM. This bootloader can be used to transfer user code

from an external source to anywhere in the program memory at power up automatically. If MP / MC of the device

is sampled low during a hardware reset, execution begins at location FF80h of the on-chip ROM. This location

contains a branch instruction to the start of the bootloader program. The standard ’54x devices provide different

ways to download the code to accommodate various system requirements:

D Parallel from 8-bit or 16-bit-wide EPROM

D Parallel from I/O space 8-bit or 16-bit mode

D Serial boot from serial ports 8-bit or 16-bit mode

D Host-port interface boot (’542, ’545, ’548, and ’549 devices only)

D Warm boot

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