TMS320VC549 datasheet(21/111 Pages) TI

21 / 111 page

TMS320C54x, TMS320LC54x, TMS320VC54x

FIXED-POINT DIGITAL SIGNAL PROCESSORS

SPRS039C – FEBRUARY 1996 – REVISED DECEMBER 1999

POST OFFICE BOX 1443

• HOUSTON, TEXAS 77251–1443

on-chip ROM (continued)

Customers can arrange to have the ROM of the ’54x programmed with contents unique to any particular

application.

on-chip dual-access RAM (DARAM)

The ’541 devices have a 5K-word

× 16-bit on-chip DARAM (5 blocks of 1K-word each).

The ’542 and ’543 devices have a 10K-word

× 16-bit on-chip DARAM (5 blocks of 2K-word each).

The ’545 and ’546 devices have a 6K-word

× 16-bit on-chip DARAM (3 blocks of 2K-word each).

The ’548 and ’549 devices have a 8K-word

× 16-bit on-chip DARAM (4 blocks of 2K-word each).

Each of these RAM blocks can be accessed twice per machine cycle. This memory is intended primarily to store

data values; however, it can be used to store program as well. At reset, the DARAM is mapped into data memory

space. DARAM can be mapped into program / data memory space by setting the OVLY bit in the PMST register.

on-chip single-access RAM (SARAM)

The ’548 and ’549 devices have a 24K word

× 16 bit on-chip SARAM (three blocks of 8K words each).

Each of these SARAM blocks is a single-access memory. This memory is intended primarily to store data values;

however, it can be used to store program as well. At reset, the SARAM is mapped into data memory space

(2000h–7FFFh). SARAM can be mapped into program / data memory space by setting the OVLY bit in the PMST

on-chip memory security

The ’54x devices have a maskable option to protect the contents of on-chip memories. When the related bit is

set, no externally originating instruction can access the on-chip memory spaces.

TMS320VC549 Datasheet(PDF) 21 Page - Texas Instruments