SMB110 datasheet(7/34 Pages) SUMMIT

7 / 34 page

SMB110

Preliminary Information

Summit Microelectronics, Inc

2099 2.3 3/1/2005

PIN DESCRIPTIONS

Pin Number

Pin Type

Pin Name

Pin Description

OUT

nRESET

The nRESET (Reset) pin is an active low open drain output. Active

when the SMB110 is powered up. Remains low for a user

programmable period of 25, 50, 100, or 200 ms after all enabled

supplies have exceeded their programmed thresholds. When used,

this pin should be pulled high by an external pull up resistor.

PWR

DRVGND

DRVGND (Driver Ground). Each DRVGND pin should be attached

externally to ground through a short wide wire.

OUT

LSDRV_CH1

The LSDRV_CH1 (Channel 1 Low-side Driver) pin is the lower

switching node of the synchronous boost controller. This pin attaches

to an external n-channel MOSFET

OUT

LSDRV_CH2

The LSDRV_CH2 (Channel 2 Low-side Driver) pin is the lower

switching node of the channel 2 synchronous buck controller. Attaches

to the gate of n-channel MOSFET.

PWR

HVSUP2

Supply for Channel 2 buck driver.

OUT

HSDRV_CH2

The HSDRV_CH2 (Channel 2 High-side Driver) pin is the upper

switching node of the channel 2 synchronous buck controller. Attach to

the gate of p-channel MOSFET. A delay exists between the assertion

of HSDRV_CH2 and assertion of LSDRV_CH2 to prevent excessive

current flow during switching.

COMP2_CH2

The COMP2_CH2 (Channel 2 secondary Compensation) pin is the

secondary compensation input of the channel 2 buck controller.

COMP1_CH2

The COMP1_CH2 (Channel 2 primary Compensation) pin is the

primary compensation input of the channel 2 buck controller. Each pin

is internally connected to a programmable resistor divider.

VM_CH2

The VM_CH2 (Channel 2 Voltage Monitor) pin connects the channel 6

controller output. Internally the VM_CH2 pin connects to an internal

programmable resistor divider.

PWR

LDO_SUPPLY

The LDO_ SUPPLY pin powers the 3.3V VSTANDBY LDO output. The

LDO_ SUPPLY pin should be connected to the output of a boost

output (usually the intermediate bus). When the battery voltage drops

below the UV1 threshold, this pin will no longer supply the LDO. Do

not apply a voltage in excess of the recommended input voltage to this

pin.

OUT

VSTANDBY

The VSTANDBY (Voltage Standby) pin is a 3.3V LDO output.

VSTANDBY is supplied from the output of the intermediate bus

through the LDO_SUPP pin. When PWR_FAIL is asserted an internal

analog multiplexer will power VSTANDBY directly from the VBATT pin.

OUT

LSDRV_CH3

The LSDRV_CH3 (Channel 3 Low-side Driver) pin is the lower

switching node of the channel 3 synchronous buck controller. Attaches

to the gate of n-channel MOSFET.

PWR

HVSUP3

Supply for Channel 3 buck driver.

SMB110 Datasheet(PDF) 7 Page - Summit Microelectronics, Inc.

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