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AT90SCR100 Datasheet(PDF) 161 Page - ATMEL Corporation |
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AT90SCR100 Datasheet(HTML) 161 Page - ATMEL Corporation |
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161 / 433 page  161 TPR0327AY–SMS–30Jan09 AT90SCR100 Register for Endpoint X” on page 167 for further details). These sources are Stall sent, Setup packet received, Data received, Data sent events. The AT90SCR100 has two interrupt vectors for both families. These vectors, called USB End- point and USB Protocol are only valid if the chip operates with the USB interface and are respectively located at addresses $003E and $0040. Every source can be enabled/disabled through bits of USBEIM or USBPIM registers. The figure below shows the implications between the registers, the USB interrupt sources and the AVR interrupt logic. For further details about the AVR Interrupt Logic please refer to Section 10. “Interrupts” on page 63. Figure 14-2. USB Interrupt Hierarchy 14.6 Suspend and Resume Modes In order to be compliant with the USB specifications V2.0, a device has to support the low-power consumption state called Suspend and its associated resumption activity called Resume. The AT90SCR100 enters the Suspend mode only when requested by the host through bus inac- tivity for at least 3ms. A USB interrupt is triggered assuming bits SREG.I is set (one) in order to enable the interrupt. Note EP3I EP2I EP1I EP0I USBPI USBEI USBPIM USBEIM LOGICAL OR AVR INTERRUPT LOGIC USB PROTOCOL USB ENDPOINT FEURI FEURIM SOFI SOFIM RMWUI RMWUIM RESI RESIM SUSI SUSIM EP3IM EP2IM EP1IM EP0IM UCSE3 UCSE3 UCSE1 UCSE3 UCSE0 UCSE2 ENDPOINT INTERRUPT PROTOCOL INTERRUPT UCSE4 UCSE5 UCSE6 UCSE7 EP4I EP5I EP6I EP7I EP4IM EP5IM EP6IM EP7IM |
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