AT90SCR100 datasheet(180/433 Pages) ATMEL

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TPR0327AY–SMS–30Jan09

AT90SCR100

the last character sent by the Terminal that gives the right to sent to the ICC, and the leading

edge of the start bit of the first character sent by the ICC will be BWT*WTX ETUs.

Parity error in T=0 protocol

In T=0 protocol, a Terminal (respectively an ICC) detecting a parity error while receiving a char-

acter shall force the Card IO line at 0 starting at 10.5 ETUs, thus reducing the first Guard bit by

half the time. The Terminal (respectively an ICC) shall maintain a 0 for 1 ETU min and 2 ETUs

max (according to ISO IEC) or to 2 ETUs (according to EMV). The ICC (respectively a Terminal)

shall monitor the Card IO to detect this error signal then attempt to repeat the character. Accord-

ing to EMV, following a parity error the character can be repeated one time, if parity error is

detected again this procedure can be repeated 3 more times. The same character can be trans-

mitted 5 times in total. ISO IEC7816-3 says this procedure is mandatory in ATR for card

supporting T=0 while EMV says this procedure is mandatory for T=0 but does not apply for ATR.

15.5

Functional Description

The architecture of the Smart Card Interface Block can be detailed as follows:

15.5.1

Barrel Shifter

The Barrel Shifter performs the translation between 1 bit serial data and 8-bit parallel data.

The barrel function is useful for character repetition as the character is still present in the shifter

at the end of the character transmission.

This shifter is able to shift the data in both directions and to invert the input or output value in

order to manage both direct and inverse ISO7816-3 convention.

Coupled with the barrel shifter is a parity checker and generator.

There are 2 registers connected to this barrel shifter, one for the transmission and one for the

reception. They act as buffers to relieve the CPU of timing constraints.

15.5.2

SCART FSM

(Smart Card Asynchronous Receiver Transmitter Finite State Machine)

This is the core of the block. Its purpose is to control the barrel shifter. To sequence correctly the

barrel shifter for a reception or a transmission, it uses the signals issued by the different coun-

ters. One of the most important counters is the guard time counter that gives time slots

corresponding to the character frame.

The SCART FSM is enabled only in UART mode. See “SCICR - Smart Card Interface Control

The transition from reception mode to the transmission mode is done automatically. Priority is

given to the transmission. Transmission refers to Terminal transmission to the ICC. Reception

refers to reception by the Terminal from the ICC.

15.5.3

ETU Counter

The ETU (Elementary Timing Unit) counter controls the operating frequency of the barrel shifter,

in fact it generates the enable signal of the barrel shifter. It receives the Card Clock, and gener-

ates the ETU clock. The Card Clock frequency is called “f” below. The ETU counter is 11 bit

wide.

A special compensation mode can be activated. It accomodates situations where the ETU is not

an integer number of Card Clock (clkSCI). The compensation mode is controlled by the COMP bit

AT90SCR100 Datasheet(PDF) 180 Page - ATMEL Corporation

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