AT90SCR100 datasheet(185/433 Pages) ATMEL

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TPR0327AY–SMS–30Jan09

AT90SCR100

15.5.7

Power-on and Power-off FSM

The Power-on Power-off Finite State Machine (FSM) applies the signals on the smart card in

accordance with ISO7816-3 standard. It drives the Activation (Cold Reset and Warm Reset as

well as De-Activation) it also manages the exception conditions such as overcurrent (see DC/DC

Converter)

To be able to power on the SCIB, the card must be present. After the detection of a card pres-

ence, the Terminal initiate a Cold Reset Activation.

The Cold Reset Activation Terminal procedure is as follow and the Figure 15-8. Timing indica-

tions are given according to ISO IEC 7816:

• RESET= Low , I/O in the receive state

• Power Vcc (see DC/DC Converter)

• Once Vcc is established, apply Clock at time Ta

• Maintain Reset Low until time Ta+tb (tb< 400 clocks)

• Monitor The I/O line for the Answer To Reset (ATR) between 400 and 40000 clock cycles

after Tb. ( 400 clocks < tc < 40000clocks)

Figure 15-8.

SCIB Activation Cold Reset Sequence after a Card Insertion

The Warm Reset Activation Terminal procedure is as follow and the Figure 15-9

• Vcc active, Reset = High, CLK active

• Terminal drives Reset low at time T to initiate the warm Reset. Reset=0 maintained for at

least 400 clocks until time Td = T+te (400 clocks < te)

• Terminal keeps the IO line in receive state

• Terminal drives Reset high after at least 400 clocks at time Td

• ICC shall respond with an ATR within 40000 clocks (tf<40000 clocks)

Data

Undefined

Tb + tc

Ta + tb

CIO

CCLK

CRST

CVcc

AT90SCR100 Datasheet(PDF) 185 Page - ATMEL Corporation