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AT90SCR100 Datasheet(PDF) 191 Page - ATMEL Corporation |
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AT90SCR100 Datasheet(HTML) 191 Page - ATMEL Corporation |
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191 / 433 page ![]() 191 TPR0327AY–SMS–30Jan09 AT90SCR100 Set this bit to indicate the card presence detector is closed when no card is inserted (CPRES is low and will go high when a card is inserted). • Bit 5..4 – VCARD[1..0]: Card Voltage Selection • Bit 3 – UART: Card UART Selection Clear this bit to use the CARDIO bit to drive the Card I/O (CIO) pin. Set this bit to use the Smart Card UART to drive the Card I/O (CIO) pin. Controls also the Waiting Time Counter as described in “Waiting Time (WT) Counter” on page 183 • Bit 2 – WTEN: Waiting Time Counter Enable Clear this bit to stop the counter and enable the load of the Waiting Time counter hold registers. The hold registers are loaded with SCWT0, SCWT1, SCWT2, SCWT3 values when SCWT2 is written. Set this bit to start the Waiting Time Counter. The counters stop when it reaches the timeout value. If the UART bit is set, the Waiting Time Counter automatically reloads with the hold registers whenever a start bit is sent or received. • Bit 1 – CREP: Character Repetition Clear this bit to disable parity error detection and indication on the Card I/O pin in receive mode and to disable character repetition in transmit mode. Set this bit to enable parity error indication on the Card I/O pin in receive mode and to set auto- matic character repetition when a parity error is indicated in transmit mode. Switching the value of CARDDET parameter can generate interruption if SCIER.CARDINIE is set. SCIER.CARDINIE must be set only when CARDDET bit is correctly configured. Table 15-1. Card Voltage Selection VCARD1 VCARD0 CVcc 00 1.8V 01 10 3.0V 11 5.0V The DCDC peripheral must be ON and the SCCON.CARDVCC bit must be high to generate the programmed card voltage. Changing VCARD while DC/DC is workding and CVcc is already ON could gener- ate unexpected behavior. Please power_off the CVcc, and take care DC/DC is not busy before changing these bits and reapplying new voltage. See Figure 16-2 on page 203. Caution ! Note Caution ! |
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