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PIC16F1933-E/P Datasheet(PDF) 253 Page - Microchip Technology |
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PIC16F1933-E/P Datasheet(HTML) 253 Page - Microchip Technology |
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253 / 418 page ![]() © 2008 Microchip Technology Inc. Preliminary DS41364A-page 251 PIC16F193X/LF193X 21.4.3 AUTOMATIC POWER MODE SWITCHING As an LCD segment is electrically only a capacitor, cur- rent is drawn only during the interval where the voltage is switching. To minimize total device current, the LCD internal reference ladder can be operated in a different power mode for the transition portion of the duration. This is controlled by the LCDRL Register (Register 21-7). The LCDLAD register allows switching between two power modes, designated ‘A’ and ‘B’. ‘A’ Power mode is active for a programmable time, beginning at the time win the LCD segments transition. ‘B’ Power mode is the remaining time before the segments or com- mons change again. The LRLAT<2:0> bits select how long, if any, that the ‘A’ Power mode is active. Refer to Figure 21-4. To implement this, the 5-bit prescaler used to divide the 32 kHz clock down to the LCD controller’s 1 kHz base rate is used to select the power mode. FIGURE 21-4: LCD INTERNAL REFERENCE LADDER POWER MODE SWITCHING DIAGRAM – TYPE A FIGURE 21-5: LCD INTERNAL REFERENCE LADDER POWER MODE SWITCHING DIAGRAM – TYPE B Single Segment Time ‘H00 ‘H01 ‘H02 ‘H03 ‘H04 ‘H05 ‘H06 ‘H07 ‘H0E ‘H0F ‘H00 ‘H01 ‘H3 Power Mode A Power Mode B Mode A LRLAT<2:0> 32kHz_clk cnt[4:0] lcd_clk LRLAT[2:0] Segment Data Power Mode Single Segment Time ‘H00 ‘H01 ‘H02 ‘H03 ‘H04 ‘H05 ‘H06 ‘H07 ‘H1E ‘H1F ‘H00 ‘H01 ‘H3 Power Mode A Power Mode B Mode A LRLAT<2:0> 32kHz_clk cnt[4:0] lcd_clk LRLAT[2:0] Segment Data Power Mode |
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