PIC16F1933-ESLASHP datasheet(256/418 Pages) MICROCHIP

256 / 418 page

PIC16F193X/LF193X

DS41364A-page 254

Preliminary

21.5

LCD Multiplex Types

The LCD driver module can be configured into one of

four multiplex types:

• Static (only COM0 is used)

• 1/2 multiplex (COM<1:0> are used)

• 1/3 multiplex (COM<2:0> are used)

• 1/4 multiplex (COM<3:0> are used)

The LMUX<1:0> bit setting of the LCDCON register

decides which of the LCD common pins are used (see

Table 21-4 for details).

If the pin is a digital I/O, the corresponding TRIS bit

controls the data direction. If the pin is a COM drive,

then the TRIS setting of that pin is overridden.

TABLE 21-4:

COMMON PIN USAGE

21.6

Segment Enables

The LCDSEn registers are used to select the pin

function for each segment pin. The selection allows

each pin to operate as either an LCD segment driver or

as one of the pin’s alternate functions. To configure the

pin as a segment pin, the corresponding bits in the

LCDSEn registers must be set to ‘1’.

If the pin is a digital I/O, the corresponding TRIS bit

controls the data direction. Any bit set in the LCDSEn

registers overrides any bit settings in the corresponding

TRIS register.

21.7

Pixel Control

The LCDDATAx registers contain bits which define the

state of each pixel. Each bit defines one unique pixel.

LCDDATAx registers to the respective common and

segment signals.

Any LCD pixel location not being used for display can

be used as general purpose RAM.

21.8

LCD Frame Frequency

The rate at which the COM and SEG outputs change is

called the LCD frame frequency.

TABLE 21-5:

FRAME FREQUENCY

FORMULAS

TABLE 21-6:

APPROXIMATE FRAME

FREQUENCY (IN Hz) USING

FOSC @ 8 MHz, TIMER1 @

32.768 kHz OR LFINTOSC

Multiplex

LMUX

<1:0>

COM3

COM2

COM1

Static

Unused

1/2

Unused

Active

1/3

Unused

Active

1/4

Active

Note:

On a Power-on Reset, these pins are

configured as normal I/O, not LCD pins.

Multiplex

Frame Frequency =

Static

Clock source/(4 x 1 x (LP<3:0> + 1))

1/2

Clock source/(2 x 2 x (LP<3:0> + 1))

1/3

Clock source/(1 x 3 x (LP<3:0> + 1))

1/4

Clock source/(1 x 4 x (LP<3:0> + 1))

Note:

Clock source is FOSC/256, T1OSC or

LFINTOSC.

LP<3:0>

Static

1/2

1/3

1/4

285

114

364

451

543

637

732

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