PIC16F1933-ESLASHP datasheet(322/418 Pages) MICROCHIP

322 / 418 page

PIC16F193X/LF193X

DS41364A-page 320

Preliminary

22.7

BAUD RATE GENERATOR

The MSSP module has a Baud Rate Generator avail-

able for clock generation in both I2C and SPI Master

modes. The Baud Rate Generator (BRG) reload value

is placed in the SSPADD register (Register 22-6).

When a write occurs to SSPBUF, the Baud Rate Gen-

erator will automatically begin counting down.

Once the given operation is complete, the internal clock

will automatically stop counting and the clock pin will

remain in its last state.

An internal signal “Reload” in Figure 22-36 triggers the

value from SSPADD to be loaded into the BRG counter.

This occurs twice for each oscillation of the module

clock line. The logic dictating when the reload signal is

asserted depends on the mode the MSSP is being

operated in.

Table 22-3

demonstrates

clock

rates

based

instruction cycles and the BRG value loaded into

SSPADD.

EQUATION 22-1:

FIGURE 22-37:

BAUD RATE GENERATOR BLOCK DIAGRAM

TABLE 22-3:

MSSP CLOCK RATE W/BRG

FCLOCK

FOSC

SSPADD

() 4

()

----------------------------------------------

Note: Values of 0x00, 0x01 and 0x02 are not valid

for SSPADD when used as a Baud Rate

Generator for I2C. This is an implementation

limitation.

FOSC

FCY

BRG Value

FCLOCK

(2 Rollovers of BRG)

32 MHz

8 MHz

13h

400 kHz(1)

32 MHz

8 MHz

19h

308 kHz

32 MHz

8 MHz

4Fh

100 kHz

16 MHz

4 MHz

09h

400 kHz(1)

16 MHz

4 MHz

0Ch

308 kHz

16 MHz

4 MHz

27h

100 kHz

4 MHz

1 MHz

09h

100 kHz

4 MHz

1 MHz

00h

250 kHz(2)

Note 1:

The I2C interface does not conform to the 400 kHz I2C specification (which applies to rates greater than

100 kHz) in all details, but may be used with care where higher rates are required by the application.

SPI mode only.

SSPM<3:0>

BRG Down Counter

SSPCLK

FOSC/2

SSPADD<7:0>

SSPM<3:0>

SCL

Reload

Control

Reload

PIC16F1933-E/P Datasheet(PDF) 322 Page - Microchip Technology

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