PIC16F1933-ESLASHP datasheet(325/418 Pages) MICROCHIP

325 / 418 page

Preliminary

DS41364A-page 323

PIC16F193X/LF193X

EECON1: EEPROM CONTROL 1 REGISTER

R/W-0/0

R/W/HC-0/0

R/W-x/q

R/W-0/0

R/S/HC-0/0

EEPGD

CFGS

LWLO

FREE

WRERR

WREN

bit 7

bit 0

Legend:

R = Readable bit

W = Writable bit

U = Unimplemented bit, read as ‘0’

S = Bit can only be set

x = Bit is unknown

-n/n = Value at POR and BOR/Value at all other Resets

‘1’ = Bit is set

‘0’ = Bit is cleared

HC = bit is cleared by hardware

bit 7

EEPGD: Flash Program/Data EEPROM Memory Select bit

= Accesses program space Flash memory

= Accesses data EEPROM memory

bit 6

CFGS: Flash Program/Data EEPROM or Configuration Select bit

= Accesses Configuration, User ID and Device ID Registers

= Accesses Flash Program or data EEPROM Memory

bit 5

LWLO: Load Write Latches Only bit

If EEPGD = 1 or CFGS = 1: (accessing program Flash)

= The next WR command does not initiate a write to the PFM; only the program memory

latches are updated.

= The next WR command writes a value from EEDATH:EEDATL into program memory latches

and initiates a write to the PFM of all the data stored in the program memory latches.

If EEPGD = 0 and CFGS = 1: (Accessing data EEPROM)

LWLO is ignored. The next WR command initiates a write to the data EEPROM.

bit 4

FREE: Program Flash Erase Enable bit

If EEPGD = 1 or CFGS = 1: (accessing program Flash)

= Perform an program Flash erase operation on the next WR command (cleared by hardware

after completion of erase).

= Perform a program Flash write operation on the next WR command.

If EEPGD = 0 and CFGS = 0: (Accessing data EEPROM)

FREE is ignored. The next WR command will initiate both a erase cycle and a write cycle.

bit 3

WRERR: EEPROM Error Flag bit

= Condition could indicate an improper program or erase sequence attempt or termination (bit is set

automatically on any set attempt (write ‘1’) of the WR bit.

= The program or erase operation completed normally.

bit 2

WREN: Program/Erase Enable bit

= Allows program/erase cycles

= Inhibits programming/erasing of program Flash and data EEPROM

bit 1

WR: Write Control bit

= Initiates a program Flash or data EEPROM program/erase operation.

The operation is self-timed and the bit is cleared by hardware once operation is complete.

The WR bit can only be set (not cleared) in software.

= Program/erase operation to the Flash or data EEPROM is complete and inactive.

bit 0

RD: Read Control bit

= Initiates an program Flash or data EEPROM read. Read takes one cycle. RD is cleared in

hardware. The RD bit can only be set (not cleared) in software.

= Does not initiate a program Flash or data EEPROM data read.

PIC16F1933-E/P Datasheet(PDF) 325 Page - Microchip Technology

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