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PIC16F1933-E/P Datasheet(PDF) 122 Page - Microchip Technology |
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PIC16F1933-E/P Datasheet(HTML) 122 Page - Microchip Technology |
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122 / 418 page ![]() PIC16F193X/LF193X DS41364A-page 120 Preliminary © 2008 Microchip Technology Inc. FIGURE 8-9: FSCM TIMING DIAGRAM TABLE 8-2: SUMMARY OF REGISTERS ASSOCIATED WITH CLOCK SOURCES OSCFIF System Clock Output Sample Clock Failure Detected Oscillator Failure Note: The system clock is normally at a much higher frequency than the sample clock. The relative frequencies in this example have been chosen for clarity. (Q) Test Test Test Clock Monitor Output Name Bit 7 Bit 6 Bit 5 Bit 4 Bit 3 Bit 2 Bit 1 Bit 0 Register on Page CONFIG1(2) CPD CP MCLRE PWRTE WDTE FOSC2 FOSC1 FOSC0 126 OSCCON SPLLEN IRCF3 IRCF2 IRCF1 IRCF0 — SCS1 SCS0 108 OSCSTAT T1OSCR PLLR OSTS HFIOFR HFIOFL MFIOFR LFIOFR HFIOFS 113 OSCTUNE — — TUN5 TUN4 TUN3 TUN2 TUN1 TUN0 114 PIE2 OSFIE C2IE C1IE EEIE BCLIE LCDIE — CCP2IE 75 PIR2 OSFIF C2IF C1IF EEIF BCLIF LCDIF — CCP2IF 78 T1CON TMR1CS1 TMR1CS0 T1CKPS1 T1CKPS0 T1OSCEN T1SYNC — TMR1ON 169 Legend: x = unknown, u = unchanged, – = unimplemented locations read as ‘0’. Shaded cells are not used by oscillators. Note 1: Other (non Power-up) Resets include MCLR Reset and Watchdog Timer Reset during normal operation. 2: See Configuration Word Register 1 (Register 10-1) for operation of all register bits. |
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