SPMCK16Z4MPV20 datasheet(22/500 Pages) FREESCALE

22 / 500 page

M68HC16 Z SERIES

USER’S MANUAL

(Continued)

Table

Title

Page

LIST OF TABLES

5-25

Chip-Select Base and Option Register Reset Values ................................... 5-69

5-26

CSBOOT Base and Option Register Reset Values....................................... 5-70

6-1

SRAM Configuration........................................................................................ 6-1

6-2

SRAM Array Address Space Type .................................................................. 6-2

7-1

ROM Array Space Field .................................................................................. 7-2

7-2

Wait States Field ............................................................................................. 7-3

8-1

FRZ Field Selection ......................................................................................... 8-4

8-2

Multiplexer Channel Sources .......................................................................... 8-5

8-3

Prescaler Output ............................................................................................. 8-7

8-4

TS Field Selection ........................................................................................... 8-7

8-5

Conversion Parameters Controlled by ADCTL1.............................................. 8-8

8-6

ADC Conversion Modes .................................................................................. 8-8

8-7

Single-Channel Conversions (MULT = 0)...................................................... 8-10

8-8

Multiple-Channel Conversions (MULT = 1) ................................................... 8-11

8-9

Result Register Formats................................................................................ 8-14

8-10

External Circuit Settling Time (10-Bit Conversions) ...................................... 8-23

8-11

Error Resulting From Input Leakage (IOFF).................................................. 8-23

9-1

Effect of DDRQS on QSM Pin Function .......................................................... 9-4

9-2

QSPI Pins ........................................................................................................ 9-8

9-3

Bits Per Transfer ........................................................................................... 9-18

9-4

Serial Frame Formats.................................................................................... 9-26

9-5

Effect of Parity Checking on Data Size ......................................................... 9-27

10-1

MCCI Interrupt Vectors.................................................................................. 10-3

10-2

Pin Assignments............................................................................................ 10-4

10-3

SPI Pin Functions .......................................................................................... 10-7

10-4

SCK Frequencies ........................................................................................ 10-11

10-5

SCI Pins ...................................................................................................... 10-17

10-6

Serial Frame Formats.................................................................................. 10-18

10-7

Effect of Parity Checking on Data Size ....................................................... 10-19

11-1

GPT Status Flags .......................................................................................... 11-5

11-2

GPT Interrupt Sources .................................................................................. 11-6

11-3

PWM Frequency Ranges ............................................................................ 11-18

A-1

Maximum Ratings............................................................................................A-1

A-2

Typical Ratings, 2.7 to 3.6V, 16.78-MHz Operation ........................................A-2

Freescale Semiconductor, Inc.

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