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SPMCK16Z4MPV20 Datasheet(PDF) 75 Page - Freescale Semiconductor, Inc |
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SPMCK16Z4MPV20 Datasheet(HTML) 75 Page - Freescale Semiconductor, Inc |
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75 / 500 page  M68HC16 Z SERIES CENTRAL PROCESSING UNIT USER’S MANUAL 4-15 ASRA Arithmetic Shift Right A INH 370D — 2 — — — — ASRB Arithmetic Shift Right B INH 371D — 2 — — — — ASRD Arithmetic Shift Right D INH 27FD — 2 — — — — ASRE Arithmetic Shift Right E INH 277D — 2 — — — — ASRM Arithmetic Shift Right AM INH 27BA — 4 — — — — — ASRW Arithmetic Shift Right Word IND16, X IND16, Y IND16, Z EXT 270D 271D 272D 273D gggg gggg gggg hh ll 8 8 8 8 —— — — BCC 2 Branch if Carry Clear If C = 0, branch REL8 B4 rr 6, 2 — — — — ———— BCLR Clear Bit(s) (M) • (Mask) ⇒ M IND8, X IND8, Y IND8, Z IND16, X IND16, Y IND16, Z EXT 1708 1718 1728 08 18 28 38 mm ff mm ff mm ff mm gggg mm gggg mm gggg mm hh ll 8 8 8 8 8 8 8 —— — — ∆∆ 0— BCLRW Clear Bit(s) in a Word (M : M + 1) • (Mask) ⇒ M : M + 1 IND16, X IND16, Y IND16, Z EXT 2708 2718 2728 2738 gggg mmmm gggg mmmm gggg mmmm hh ll mmmm 10 10 10 10 —— — — ∆∆ 0— BCS2 Branch if Carry Set If C = 1, branch REL8 B5 rr 6, 2 — — — — ———— BEQ2 Branch if Equal If Z = 1, branch REL8 B7 rr 6, 2 — — — — ———— BGE2 Branch if Greater Than or Equal to Zero If N ⊕ V = 0, branch REL8 BC rr 6, 2 — — — — ———— BGND Enter Background Debug Mode If BDM enabled, begin debug; else, illegal instruction trap INH 37A6 — — — — — — ———— BGT2 Branch if Greater Than Zero If Z ' (N ⊕ V) = 0, branch REL8 BE rr 6, 2 — — — — ———— BHI2 Branch if Higher If C ' Z = 0, branch REL8 B2 rr 6, 2 — — — — ———— BITA Bit Test A (A) • (M) IND8, X IND8, Y IND8, Z IMM8 IND16, X IND16, Y IND16, Z EXT E, X E, Y E, Z 49 59 69 79 1749 1759 1769 1779 2749 2759 2769 ff ff ff ii gggg gggg gggg hh ll — — — 6 6 6 2 6 6 6 6 6 6 6 —— — — ∆∆ 0— Table 4-2 Instruction Set Summary (Continued) Mnemonic Operation Description Address Instruction Condition Codes Mode Opcode Operand Cycles S MV H EV N Z V C Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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