SPMCK16Z4MPV20 datasheet(70/500 Pages) FREESCALE

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CENTRAL PROCESSOR UNIT

M68HC16 Z SERIES

4-10

USER’S MANUAL

4.6.2 Extended Addressing Modes

Regular extended mode instructions contain ADDR[15:0] in the word following the op-

code. The effective address is formed by concatenating the EK field and the 16-bit byte

address. EXT20 mode is used only by the JMP and JSR instructions. These instruc-

tions contain a 20-bit effective address that is zero-extended to 24 bits to give the in-

struction an even number of bytes.

4.6.3 Indexed Addressing Modes

In the indexed modes, registers IX, IY, and IZ, together with their associated extension

fields, are used to calculate the effective address.

For 8-bit indexed modes an 8-bit unsigned offset contained in the instruction is added

to the value contained in an index register and its extension field.

For 16-bit modes, a 16-bit signed offset contained in the instruction is added to the val-

ue contained in an index register and its extension field.

For 20-bit modes, a 20-bit signed offset (zero-extended to 24 bits) is added to the val-

ue contained in an index register. These modes are used for JMP and JSR instructions

only.

4.6.4 Inherent Addressing Mode

Inherent mode instructions use information directly available to the processor to deter-

mine the effective address. Operands, if any, are system resources and are thus not

fetched from memory.

4.6.5 Accumulator Offset Addressing Mode

Accumulator offset modes form an effective address by sign-extending the content of

accumulator E to 20 bits, then adding the result to an index register and its associated

extension field. This mode allows use of an index register and an accumulator within

a loop without corrupting accumulator D.

4.6.6 Relative Addressing Modes

Relative modes are used for branch and long branch instructions. If a branch condition

is satisfied, a byte or word signed two’s complement offset is added to the concatenat-

ed PK field and program counter. The new PK : PC value is the effective address.

4.6.7 Post-Modified Index Addressing Mode

Post-modified index mode is used by the MOVB and MOVW instructions. A signed 8-

bit offset is added to index register X after the effective address formed by XK : IX is

used.

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SPMCK16Z4MPV20 Datasheet(PDF) 70 Page - Freescale Semiconductor, Inc