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DM3730, DM3725

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SPRS685 – AUGUST 2010

Table 2-1. Ball Characteristics (CBP Pkg.)(3) (continued)

BALL

BUFFER

BALL

RESET

PULLUP

BALL TOP

RESET

STRENG

IO CELL

BOTTOM

PIN NAME [3]

MODE [4]

TYPE [5]

RESET

REL. MODE POWER [9] HYS [10]

/DOWN

[2]

REL.

TH (mA)

[13]

[1]

STATE [6]

[8]

TYPE [12]

STATE [7]

[11]

G1, A13,

AB2, AB22,

No Connect

(2)

A14,A16,

B2, B22

A17, B14,

B16, B17,

C14, C15,

C17, D17,

D18, H9,

H10, H11,

H12, H13,

H14, H15,

H16, H17,

A4, A6, A7,

A9, A10,

A11, A19,

A20, A21,

B3, B4, B6,

B7, B9, B10,

B11, B13,

B19, B20,

B21, C1,C2,

C3, C4,C5,

C6, C8,C9,

C11, C12,

C18, C20,

C21, D1,

D2, D3, D4,

D5,D6, D11,

D12,D14,

D20, E1,E2,

AA26,AE27,

A27, A28,

B28, AG1,

AG28, AH1,

AH2,AH27,

AH28

Y17

sys_xtalgnd

GND

cap_vdd_bb_

PWR

mpu_iva

cap_vdd_sram

PWR

_mpu_iva

L21

cap_vdd_sram_core 0

PWR

(1) The usage of this GPIO is strongly restricted. For more information, see the GPIO chapter of the AM/DM37x Multimedia Device

Technical Reference Manual (literature number SPRUGN4).

(2) Pins labeled as "No connect" must be left unconnected. Any connections to these pins may result in unpredictable behavior.

(3) NA in this table stands for "Not Applicable".

(4) The drive strength is fixed regardless of the load. The driver is designed to drive 75-ohm for video applications.

(5) PU = [50 to 100 k

Ω] per default or [10 to 50 kΩ] according to the selected mode.

For a full description of the pull-up drive strength programming, see the PRG_SDMMC_PUSTRENGTH configuration register bit field in

the System Control Module chapter of the AM/DM37x Multimedia Device Technical Reference Manual (literature number SPRUGN4).

PD: 30 to 150 k

Ω.

(6) The pullup and pulldown can be either the standard LVCMOS 100-mA drive strength or the I2C pullup and pulldown described below:

Nominal resistance = 1.66 k

Ω in high-speed mode with a load range of 5 pF to 12 pF, 4.5 kΩ in standard / fast mode with a load range

of 5 pF to 15 pF.

(7) The default buffer configuration is High-Speed I2C point-to-point mode using internal pullup. For a full description of the pull drive

strength programming, see prg_i2c1_pullupresx, prg_i2c1_lb1lb0, and prg_sr_pullupresx, prg_sr_lb bits of the CONTROL_PROG_IO1,

CONTROL_PROG_IO_WKUP1 control modules in the System Control Module / SCM Programming Model / Feature Settings section

and the System Control Module chapter of the AM/DM37x Multimedia Device Technical Reference Manual (literature number

SPRUGN4) to modify the IO settings if required by the targeted interface application.

(8) The default buffer configuration is standard LVCMOS mode (non-I2C). For a full description of the pull drive strength programming, see

PADCONFS bits of CONTROL_PADCONF_X control modules (standard LVCMOS mode), or prg_i2c2_pullupresx, prg_i2c2_lb1lb0, and

prg_i2c3_pullupresx, prg_i2c3_lb1lb0 bits of the CONTROL_PROG_IO2, CONTROL_PROG_IO3 control modules (I2C mode) in the

System Control Module chapter of the AM/DM37x Multimedia Device Technical Reference Manual (literature number SPRUGN4) to

modify the IO settings if required by the targeted interface application.

(9) These signals are feed-through balls. For more information, see Table 2-28.

(10) In buffer mode, the drive strength is fixed regardless of the load. The driver is designed to drive 75

Ω for video applications. In bypass

mode, the drive strength is 0.47 mA.

(11) Depending on the sys_clkreq direction the corresponding reset released state value can be:

–

Z if sys_clkreq is used as input

–

1 if sys_clkreq is used as output

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