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DM3725 Datasheet(PDF) 64 Page - Texas Instruments

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Part # DM3725
Description  Applications Processor
PDF  268 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

DM3725 Datasheet(HTML) 64 Page - Texas Instruments

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DM3730, DM3725
SPRS685 – AUGUST 2010
www.ti.com
Table 2-3. Ball Characteristics (CUS Pkg.)(1) (continued)
BALL
BALL TOP [2]
PIN NAME
MODE [4]
TYPE [5]
BALL RESET BALL RESET RESET REL. POWER [9]
HYS [10]
BUFFER
PULLUP
BOTTOM [1]
[3]
STATE [6]
REL. STATE MODE [8]
STRENGTH
/DOWN
[7]
(mA) [11]
TYPE [12]
E15
sdrc_d24
0
IO
L
Z
0
vdds_mem
Yes
4
(8)
PU/ PD
LVCMOS
D15
sdrc_d25
0
IO
L
Z
0
vdds_mem
Yes
4
(8)
PU/ PD
LVCMOS
C15
sdrc_d26
0
IO
L
Z
0
vdds_mem
Yes
4
(8)
PU/ PD
LVCMOS
B16
sdrc_d27
0
IO
L
Z
0
vdds_mem
Yes
4
(8)
PU/ PD
LVCMOS
C16
sdrc_d28
0
IO
L
Z
0
vdds_mem
Yes
4
(8)
PU/ PD
LVCMOS
D16
sdrc_d29
0
IO
L
Z
0
vdds_mem
Yes
4
(8)
PU/ PD
LVCMOS
B17
sdrc_d30
0
IO
L
Z
0
vdds_mem
Yes
4
(8)
PU/ PD
LVCMOS
B18
sdrc_d31
0
IO
L
Z
0
vdds_mem
Yes
4
(8)
PU/ PD
LVCMOS
C18
sdrc_ba0
0
O
0
0
0
vdds_mem
NA
4
(8)
PU/ PD
LVCMOS
D18
sdrc_ba1
0
O
0
0
0
vdds_mem
NA
4
(8)
PU/ PD
LVCMOS
A4
sdrc_a0
0
O
0
0
0
vdds_mem
NA
4
(8)
PU/ PD
LVCMOS
B4
sdrc_a1
0
O
0
0
0
vdds_mem
NA
4
(8)
PU/ PD
LVCMOS
D6
sdrc_a2
0
O
0
0
0
vdds_mem
NA
4
(8)
PU/ PD
LVCMOS
B3
sdrc_a3
0
O
0
0
0
vdds_mem
NA
4
(8)
PU/ PD
LVCMOS
B2
sdrc_a4
0
O
0
0
0
vdds_mem
NA
4
(8)
PU/ PD
LVCMOS
C3
sdrc_a5
0
O
0
0
0
vdds_mem
NA
4
(8)
PU/ PD
LVCMOS
E3
sdrc_a6
0
O
0
0
0
vdds_mem
NA
4
(8)
PU/ PD
LVCMOS
F6
sdrc_a7
0
O
0
0
0
vdds_mem
NA
4
(8)
PU/ PD
LVCMOS
E10
sdrc_a8
0
O
0
0
0
vdds_mem
NA
4
(8)
PU/ PD
LVCMOS
E9
sdrc_a9
0
O
0
0
0
vdds_mem
NA
4
(8)
PU/ PD
LVCMOS
E7
sdrc_a10
0
O
0
0
0
vdds_mem
NA
4
(8)
PU/ PD
LVCMOS
G6
sdrc_a11
0
O
0
0
0
vdds_mem
NA
4
(8)
PU/ PD
LVCMOS
G7
sdrc_a12
0
O
0
0
0
vdds_mem
NA
4
(8)
PU/ PD
LVCMOS
F7
sdrc_a13
0
O
0
0
0
vdds_mem
NA
4
(8)
PU/ PD
LVCMOS
F9
sdrc_a14
0
O
0
0
0
vdds_mem
NA
4
(8)
PU/ PD
LVCMOS
A19
sdrc_ncs0
0
O
1
1
0
vdds_mem
NA
4
(8)
PU/ PD
LVCMOS
B19
sdrc_ncs1
0
O
1
1
0
vdds_mem
NA
4
(8)
PU/ PD
LVCMOS
A10
sdrc_clk
0
IO
L
0
0
vdds_mem
Yes
4
(8)
PU/ PD
LVCMOS
A11
sdrc_nclk
0
O
1
1
0
vdds_mem
NA
4
(8)
PU/ PD
LVCMOS
B20
sdrc_cke0
0
O
H
1
7
vdds_mem
NA
4
(8)
PU/ PD
LVCMOS
safe_mode_out1
(9)
7
C20
sdrc_cke1
0
O
H
1
7
vdds_mem
NA
4
(8)
PU/ PD
LVCMOS
safe_mode_out1
(9)
7
D19
sdrc_nras
0
O
1
1
0
vdds_mem
NA
4
(8)
PU/ PD
LVCMOS
C19
sdrc_ncas
0
O
1
1
0
vdds_mem
NA
4
(8)
PU/ PD
LVCMOS
A20
sdrc_nwe
0
O
1
1
0
vdds_mem
NA
4
(8)
PU/ PD
LVCMOS
B6
sdrc_dm0
0
O
0
0
0
vdds_mem
NA
4
(8)
PU/ PD
LVCMOS
B13
sdrc_dm1
0
O
0
0
0
vdds_mem
NA
4
(8)
PU/ PD
LVCMOS
A7
sdrc_dm2
0
O
0
0
0
vdds_mem
NA
4
(8)
PU/ PD
LVCMOS
A16
sdrc_dm3
0
O
0
0
0
vdds_mem
NA
4
(8)
PU/ PD
LVCMOS
A5
sdrc_dqs0
0
IO
L
Z
0
vdds_mem
Yes
4
(8)
PU/ PD
LVCMOS
A13
sdrc_dqs1
0
IO
L
Z
0
vdds_mem
Yes
4
(8)
PU/ PD
LVCMOS
A8
sdrc_dqs2
0
IO
L
Z
0
vdds_mem
Yes
4
(8)
PU/ PD
LVCMOS
A17
sdrc_dqs3
0
IO
L
Z
0
vdds_mem
Yes
4
(8)
PU/ PD
LVCMOS
K4
gpmc_a1
0
O
L
L
7
vdds_mem
Yes
8
PU/ PD
LVCMOS
gpio_34
4
IO
safe_mode
7
K3
gpmc_a2
0
O
L
L
7
vdds_mem
Yes
8
PU/ PD
LVCMOS
gpio_35
4
IO
safe_mode
7
K2
gpmc_a3
0
O
L
L
7
vdds_mem
Yes
8
PU/ PD
LVCMOS
gpio_36
4
IO
safe_mode
7
J4
gpmc_a4
0
O
L
L
7
vdds_mem
Yes
8
PU/ PD
LVCMOS
gpio_37
4
IO
64
TERMINAL DESCRIPTION
Copyright © 2010, Texas Instruments Incorporated
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Product Folder Link(s): DM3730 DM3725



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