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DM3725 Datasheet(PDF) 49 Page - Texas Instruments

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Part # DM3725
Description  Applications Processor
PDF  268 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

DM3725 Datasheet(HTML) 49 Page - Texas Instruments

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DM3730, DM3725
www.ti.com
SPRS685 – AUGUST 2010
Table 2-2. Ball Characteristics (CBC Pkg.)(5) (continued)
BALL
BALL TOP
PIN NAME [3]
MODE [4]
TYPE [5]
BALL
BALL RESET RESET
POWER [9] HYS [10]
BUFFER
PULLUP
IO CELL
BOTTOM
[2]
RESET
REL. STATE
REL. MODE
STRENGTH /DOWN
[13]
[1]
STATE [6]
[7]
[8]
(mA) [11]
TYPE [12]
safe_mode
7
-
W19
NA
hsusb0_clk
0
I
L
L
7
vdds
Yes
8
PU/ PD
LVCMOS
gpio_120
4
IO
safe_mode
7
-
V20
NA
hsusb0_data0
0
IO
L
L
7
vdds
Yes
4
PU/ PD
LVCMOS
uart3_tx_irtx
2
O
gpio_125
4
IO
uart2_tx
5
O
safe_mode
7
-
Y20
NA
hsusb0_data1
0
IO
L
L
7
vdds
Yes
4
PU/ PD
LVCMOS
uart3_rx_irrx
2
I
gpio_130
4
IO
uart2_rx
5
I
safe_mode
7
-
V18
NA
hsusb0_data2
0
IO
L
L
7
vdds
Yes
4
PU/ PD
LVCMOS
uart3_rts_sd
2
O
gpio_131
4
IO
uart2_rts
5
O
safe_mode
7
-
W20
NA
hsusb0_data3
0
IO
L
L
7
vdds
Yes
4
PU/ PD
LVCMOS
uart3_cts_rctx
2
IO
gpio_169
4
IO
uart2_cts
5
I
safe_mode
7
-
W17
NA
hsusb0_data4
0
IO
L
L
7
vdds
Yes
4
PU/ PD
LVCMOS
gpio_188
4
IO
safe_mode
7
-
Y18
NA
hsusb0_data5
0
IO
L
L
7
vdds
Yes
4
PU/ PD
LVCMOS
gpio_189
4
IO
safe_mode
7
-
Y19
NA
hsusb0_data6
0
IO
L
L
7
vdds
Yes
4
PU/ PD
LVCMOS
gpio_190
4
IO
safe_mode
7
-
Y17
NA
hsusb0_data7
0
IO
L
L
7
vdds
Yes
4
PU/ PD
LVCMOS
gpio_191
4
IO
safe_mode
7
-
V19
NA
hsusb0_dir
0
I
L
L
7
vdds
Yes
4
PU/ PD
LVCMOS
gpio_122
4
IO
safe_mode
7
-
W18
NA
hsusb0_nxt
0
I
L
L
7
vdds
Yes
4
PU/ PD
LVCMOS
gpio_124
4
IO
safe_mode
7
-
U20
NA
hsusb0_stp
0
O
H
H
7
vdds
Yes
4
PU/ PD
LVCMOS
gpio_121
4
IO
safe_mode
7
-
U15
NA
jtag_ntrst
0
I
L
L
0
vdds
Yes
NA
PU/ PD
LVCMOS
W13
NA
jtag_rtck
0
O
L
0
0
vdds
NA
4
PU/ PD
LVCMOS
V14
NA
jtag_tck
0
I
L
L
0
vdds
Yes
NA
PU/ PD
LVCMOS
U16
NA
jtag_tdi
0
I
H
H
0
vdds
Yes
NA
PU/ PD
LVCMOS
Y13
NA
jtag_tdo
0
O
L
Z
0
vdds
NA
4
PU/ PD
LVCMOS
V15
NA
jtag_tms_tmsc
0
IO
H
H
0
vdds
Yes
4
PU/ PD
LVCMOS
N19
NA
mmc1_clk
0
IO
L
L
7
vdds_mmc1 Yes
1
PU/ PD
(3)
LVCMOS
gpio_120
(8)
4
IO
safe_mode
7
-
L18
NA
mmc1_cmd
0
O
L
L
7
vdds_mmc1 Yes
1
PU/ PD
(3)
LVCMOS
Copyright © 2010, Texas Instruments Incorporated
TERMINAL DESCRIPTION
49
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Product Folder Link(s): DM3730 DM3725



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