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DM3725 Datasheet(PDF) 65 Page - Texas Instruments

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Part # DM3725
Description  Applications Processor
PDF  268 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

DM3725 Datasheet(HTML) 65 Page - Texas Instruments

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DM3730, DM3725
www.ti.com
SPRS685 – AUGUST 2010
Table 2-3. Ball Characteristics (CUS Pkg.)(1) (continued)
BALL
BALL TOP [2]
PIN NAME
MODE [4]
TYPE [5]
BALL RESET BALL RESET RESET REL. POWER [9]
HYS [10]
BUFFER
PULLUP
BOTTOM [1]
[3]
STATE [6]
REL. STATE MODE [8]
STRENGTH
/DOWN
[7]
(mA) [11]
TYPE [12]
safe_mode
7
J3
gpmc_a5
0
O
L
L
7
vdds_mem
Yes
8
PU/ PD
LVCMOS
gpio_38
4
IO
safe_mode
7
J2
gpmc_a6
0
O
H
H
7
vdds_mem
Yes
8
PU/ PD
LVCMOS
gpio_39
4
IO
safe_mode
7
J1
gpmc_a7
0
O
H
H
7
vdds_mem
Yes
8
PU/ PD
LVCMOS
gpio_40
4
IO
safe_mode
7
H1
gpmc_a8
0
O
H
H
7
vdds_mem
Yes
8
PU/ PD
LVCMOS
gpio_41
4
IO
safe_mode
7
H2
gpmc_a9
0
O
H
H
7
vdds_mem
Yes
8
PU/ PD
LVCMOS
sys_ndmareq2
1
I
gpio_42
4
IO
safe_mode
7
G2
gpmc_a10
0
O
H
H
7
vdds_mem
Yes
8
PU/ PD
LVCMOS
sys_ndmareq3
1
I
gpio_43
4
IO
safe_mode
7
L2
gpmc_d0
0
IO
H
H
0
vdds_mem
Yes
8
PU/ PD
LVCMOS
M1
gpmc_d1
0
IO
H
H
0
vdds_mem
Yes
8
PU/ PD
LVCMOS
M2
gpmc_d2
0
IO
H
H
0
vdds_mem
Yes
8
PU/ PD
LVCMOS
N2
gpmc_d3
0
IO
H
H
0
vdds_mem
Yes
8
PU/ PD
LVCMOS
M3
gpmc_d4
0
IO
H
H
0
vdds_mem
Yes
8
PU/ PD
LVCMOS
P1
gpmc_d5
0
IO
H
H
0
vdds_mem
Yes
8
PU/ PD
LVCMOS
P2
gpmc_d6
0
IO
H
H
0
vdds_mem
Yes
8
PU/ PD
LVCMOS
R1
gpmc_d7
0
IO
H
H
0
vdds_mem
Yes
8
PU/ PD
LVCMOS
R2
gpmc_d8
0
IO
H
H
0
vdds_mem
Yes
8
PU/ PD
LVCMOS
gpio_44
4
IO
safe_mode
7
T2
gpmc_d9
0
IO
H
H
0
vdds_mem
Yes
8
PU/ PD
LVCMOS
gpio_45
4
IO
safe_mode
7
U1
gpmc_d10
0
IO
H
H
0
vdds_mem
Yes
8
PU/ PD
LVCMOS
gpio_46
4
IO
safe_mode
7
R3
gpmc_d11
0
IO
H
H
0
vdds_mem
Yes
8
PU/ PD
LVCMOS
gpio_47
4
IO
safe_mode
7
T3
gpmc_d12
0
IO
H
H
0
vdds_mem
Yes
8
PU/ PD
LVCMOS
gpio_48
4
IO
safe_mode
7
U2
gpmc_d13
0
IO
H
H
0
vdds_mem
Yes
8
PU/ PD
LVCMOS
gpio_49
4
IO
safe_mode
7
V1
gpmc_d14
0
IO
H
H
0
vdds_mem
Yes
8
PU/ PD
LVCMOS
gpio_50
4
IO
safe_mode
7
V2
gpmc_d15
0
IO
H
H
0
vdds_mem
Yes
8
PU/ PD
LVCMOS
gpio_51
4
IO
safe_mode
7
E2
gpmc_ncs0
0
O
1
1
0
vdds_mem
NA
8
NA
LVCMOS
D2
gpmc_ncs3
0
O
H
H
7
vdds_mem
Yes
8
PU/ PD
LVCMOS
Copyright © 2010, Texas Instruments Incorporated
TERMINAL DESCRIPTION
65
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Product Folder Link(s): DM3730 DM3725



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