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DM3725 Datasheet(PDF) 26 Page - Texas Instruments

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Part # DM3725
Description  Applications Processor
PDF  268 Pages
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Manufacturer  TI [Texas Instruments]
Direct Link  http://www.ti.com
Logo TI - Texas Instruments

DM3725 Datasheet(HTML) 26 Page - Texas Instruments

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DM3730, DM3725
SPRS685 – AUGUST 2010
www.ti.com
Table 2-1. Ball Characteristics (CBP Pkg.)(3) (continued)
BALL
BUFFER
BALL
BALL
RESET
PULLUP
BALL TOP
RESET
STRENG
IO CELL
BOTTOM
PIN NAME [3]
MODE [4]
TYPE [5]
RESET
REL. MODE POWER [9] HYS [10]
/DOWN
[2]
REL.
TH (mA)
[13]
[1]
STATE [6]
[8]
TYPE [12]
STATE [7]
[11]
N3
AC18
gpmc_a7
0
O
H
H
7
vdds_mem
Yes
8
PU/ PD
LVCMOS
gpio_40
4
IO
safe_mode
7
M3
AB18
gpmc_a8
0
O
H
H
7
vdds_mem
Yes
8
PU/ PD
LVCMOS
gpio_41
4
IO
safe_mode
7
L3
AC19
gpmc_a9
0
O
H
H
7
vdds_mem
Yes
8
PU/ PD
LVCMOS
sys_ndmareq2
1
I
gpio_42
4
IO
safe_mode
7
K3
AB19
gpmc_a10
0
O
H
H
7
vdds_mem
Yes
8
PU/ PD
LVCMOS
sys_ndmareq3
1
I
gpio_43
4
IO
safe_mode
7
NA
AC20
gpmc_a11
0
O
L
L
7
vdds_mem
Yes
8
PU/ PD
LVCMOS
safe_mode
7
K1
M2
gpmc_d0
0
IO
H
H
0
vdds_mem
Yes
8
PU/ PD
LVCMOS
L1
M1
gpmc_d1
0
IO
H
H
0
vdds_mem
Yes
8
PU/ PD
LVCMOS
L2
N2
gpmc_d2
0
IO
H
H
0
vdds_mem
Yes
8
PU/ PD
LVCMOS
P2
N1
gpmc_d3
0
IO
H
H
0
vdds_mem
Yes
8
PU/ PD
LVCMOS
T1
R2
gpmc_d4
0
IO
H
H
0
vdds_mem
Yes
8
PU/ PD
LVCMOS
V1
R1
gpmc_d5
0
IO
H
H
0
vdds_mem
Yes
8
PU/ PD
LVCMOS
V2
T2
gpmc_d6
0
IO
H
H
0
vdds_mem
Yes
8
PU/ PD
LVCMOS
W2
T1
gpmc_d7
0
IO
H
H
0
vdds_mem
Yes
8
PU/ PD
LVCMOS
H2
AB3
gpmc_d8
0
IO
H
H
0
vdds_mem
Yes
8
PU/ PD
LVCMOS
gpio_44
4
IO
safe_mode
7
K2
AC3
gpmc_d9
0
IO
H
H
0
vdds_mem
Yes
8
PU/ PD
LVCMOS
gpio_45
4
IO
safe_mode
7
P1
AB4
gpmc_d10
0
IO
H
H
0
vdds_mem
Yes
8
PU/ PD
LVCMOS
gpio_46
4
IO
safe_mode
7
R1
AC4
gpmc_d11
0
IO
H
H
0
vdds_mem
Yes
8
PU/ PD
LVCMOS
gpio_47
4
IO
safe_mode
7
R2
AB6
gpmc_d12
0
IO
H
H
0
vdds_mem
Yes
8
PU/ PD
LVCMOS
gpio_48
4
IO
safe_mode
7
T2
AC6
gpmc_d13
0
IO
H
H
0
vdds_mem
Yes
8
PU/ PD
LVCMOS
gpio_49
4
IO
safe_mode
7
W1
AB7
gpmc_d14
0
IO
H
H
0
vdds_mem
Yes
8
PU/ PD
LVCMOS
gpio_50
4
IO
safe_mode
7
Y1
AC7
gpmc_d15
0
IO
H
H
0
vdds_mem
Yes
8
PU/ PD
LVCMOS
gpio_51
4
IO
safe_mode
7
G4
Y2
gpmc_ncs0
0
O
1
1
0
vdds_mem
NA
8
NA
LVCMOS
H3
Y1
gpmc_ncs1
0
O
H
1
0
vdds_mem
Yes
8
PU/ PD
LVCMOS
gpio_52
4
IO
safe_mode
7
26
TERMINAL DESCRIPTION
Copyright © 2010, Texas Instruments Incorporated
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Product Folder Link(s): DM3730 DM3725



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