ADS1178IPAPR datasheet(16/39 Pages) TI1

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POWER-DOWN (PWDN)

NOTE:(1)InSPIprotocol,thetimingoccursonthefallingedgeof

/FSYNC.Poweringdownallchannelsforces

/FSYNChigh.

DRDY

CLK

DRDY/FSYNC

(1)

DOUT

(DiscreteDataOutputMode)

· · ·

PWDN

NDR

PDWN

-UpData

ostPower

DOUT1

(TDMMode,DynamicPosition)

NormalPosition

DataShiftPosition

NormalPosition

DataRemaininPosition

DOUT1

(TDMMode,FixedPosition)

ADS1174

ADS1178

SBAS373B – OCTOBER 2007 – REVISED SEPTEMBER 2008 ........................................................................................................................................ www.ti.com

2. Wait

for

130/fDATA

(SPI)

129/fDATA

(Frame-Sync) after taking the PWDN pins high.

The ADS1174/78 measurement channels can be

3. Detect for non-zero data in the powered-up

independently powered down by use of the PWDN

channel.

inputs. To enter the power-down mode, hold the

respective PWDN pin low for at least two fCLK cycles.

After powering up one or more channels, the

To exit power-down, return the corresponding PWDN

channels are synchronized to each other. It is not

pin high. Note that when all channels are powered

necessary to use the SYNC pin to synchronize them.

down, the ADS1174/78 enters a microwatt (

µW)

When a channel is powered down in TDM data

power state where all internal biasing is powered

format, the data for the powered-down channel are

down. In this event, the TEST[1:0] input pins must be

either forced to zero (fixed-position TDM data mode)

driven; all other input pins can float (the ADS1174/78

or replaced by shifting the data from the next channel

outputs remain driven).

into the vacated data position (dynamic-position TDM

As shown in Figure 15 and Table 9, a maximum of

data mode).

130

conversion

cycles

(SPI

interface)

129

In discrete data format, the data are always forced to

conversion

cycles

(Frame-Sync

interface)

must

zero.

When

powering-up

channel

elapse before reading data after exiting power-down.

dynamic-position TDM data format mode, the channel

Data from channels already running are not affected.

data remain packed until the data are ready, at which

The user software can perform the required delay

time the data frame is expanded to include the

time in the following ways:

just-powered channel data. See the Data Format

1. Count the number of data conversions after

section for details.

taking the PWDN pin high.

Figure 15. Power-Down Timing

Table 9. Power-Down Timing

SYMBOL

DESCRIPTION

MIN

TYP

MAX

UNITS

tPDWN

PDWN pulse width to enter Power-Down mode

CLK periods

Time for new data to be ready (SPI)

129

130

Conversions (1/fDATA)

tNDR

Time for new data to be ready (Frame-Sync)

128

129

Conversions (1/fDATA)

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ADS1178IPAPR Datasheet(PDF) 16 Page - Texas Instruments

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