ADS1178IPAPR datasheet(9/39 Pages) TI1

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OVERVIEW

Modulator1

Digital

Filter1

VREFP

IN1

VREFN

REF

TEST[1:0]

FORMAT[2:0]

CLK

SYNC

PWDN

(1)

[4:1]/[8:1]

CLKDIV

MODE

DRDY/FSYNC

SCLK

DOUT[4:1]/[8:1]

(1)

DIN

SPI

and

Frame-Sync

Interface

Control

Logic

AINP1

AINN1

VCOM

Modulator2

Digital

Filter2

IN2

AINP2

AINN2

Modulator4/8

(1)

Digital

Filter4/8

(1)

IN4/8

AINP4/8

(1)

AINN4/8

(1)

DVDD

AVDD

AGND

DGND

IOVDD

NOTE:(1)TheADS1174hasfourchannels;theADS1178haseightchannels.

ADS1174

ADS1178

www.ti.com ........................................................................................................................................ SBAS373B – OCTOBER 2007 – REVISED SEPTEMBER 2008

To allow tradeoffs between speed and power, two

The ADS1174 (quad) and ADS1178 (octal) are 16-bit,

modes of operation are supported: High-Speed and

delta-sigma ADCs. They offer the combination of

Low-Power. Table 1 summarizes the performance of

excellent

linearity,

low

noise,

and

low

power

each mode.

consumption. Figure 1 shows the block diagram. Note

that both devices are the same, except the ADS1174

In High-Speed mode, the data rate is 52kSPS, and in

has four ADCs, and the ADS1178 has eight ADCs.

Low-Power mode, the power dissipation is only

The pinout and package of the ADS1178 are

7mW/channel at 10.5kSPS.

compatible

with

the

ADS1174

(and

the

24-bit

The ADS1174/78 is configured by simply setting the

ADS1274

and

ADS1278),

permitting

drop-in

appropriate I/O pins—there are no registers to

expandability

upgrades.

The

converters

are

program. Data are retrieved over a serial interface

comprised

either

four

(ADS1174)

eight

that supports both SPI and Frame-Sync formats. The

(ADS1178) advanced, 6th-order, chopper-stabilized,

ADS1174/78 has a daisy-chainable output and the

delta-sigma modulators followed by low-ripple, linear

ability to synchronize externally, so it can be used

phase FIR filters. The modulators measure the

conveniently in systems requiring more than eight

differential input signal, VIN = (AINP – AINN), against

channels.

the differential reference, VREF = (VREFP – VREFN).

The digital filters receive the modulator signal and

provide a low-noise digital output.

Figure 1. ADS1174/ADS1178 Block Diagram

Table 1. Operating Mode Performance Summary

POWER DISSIPATION

DATA RATE

PASSBAND

SNR

NOISE

PER CHANNEL(1)

MODE

(SPS)

(Hz)

(dB)

(LSBPP)

(mW)

High-Speed

52,734

23,889

Low-Power

10,547

4,778

(1)

Measured with all channels operating.

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