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MPC5602DPB Datasheet(PDF) 18 Page - Freescale Semiconductor, Inc

Part # MPC5602DPB
Description  MPC5602D Microcontroller Product Brief
PDF  27 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPC5602DPB Datasheet(HTML) 18 Page - Freescale Semiconductor, Inc

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MPC5602D Microcontroller Product Brief, Rev. 3.1
Preliminary—Subject to Change Without Notice
Device family overview
Freescale Semiconductor
18
— Input clock frequency from 4 MHz to 16 MHz
— Clock source: external oscillator
— Lock detect circuitry continuously monitors lock status
— Loss of clock (LOC) detection for reference and feedback clocks
— On-chip loop filter
Improves electromagnetic interference performance
Reduces number of external components required
•
On-chip fast external crystal oscillator supporting 4 MHz to 16 MHz
•
Dedicated 16 MHz fast internal RC oscillator
— Used as default clock source out of reset
— Provides clock for rapid startup from low power modes
— Provides back-up clock in the event of FMPLL or external oscillator clock failure
— Offers independent clock source for the watchdog timer
— 5% accuracy over the operating temperature range
— Trimming registers to support frequency adjustment with in-application calibration
•
Dedicated 128 kHz slow internal RC oscillator for low power mode operation and self wakeup
— 10% accuracy
— Trimming registers to support improve accuracy with in-application calibration
3.5.12
System timers
3.5.12.1
Introduction
The system timers include:
•
Peripheral Interrupt Timer (PIT) timers (including ADC trigger)
•
1 Real-time Counter (RTC) timer
The PIT is an array of timers that can be used to raise interrupts, trigger CTU channels, and ADC
conversions. The RTC supports wakeup from low power modes or real-time clock generation.
3.5.12.2
Periodic interrupt timer module (PIT)
The PIT features the following:
•
4 general purpose interrupt timers
•
1 interrupt timers for triggering ADC injected conversions (12-bit ADC)
•
Up to 2 interrupt timers for triggering DMA transfers
•
1 interrupt timers for triggering CTU
•
32-bit counter resolution
•
Clocked by system clock frequency



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