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MPXD2005VLU80R Datasheet(PDF) 19 Page - Freescale Semiconductor, Inc

Part # MPXD2005VLU80R
Description  PXD20 Microcontroller
PDF  130 Pages
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Manufacturer  FREESCALE [Freescale Semiconductor, Inc]
Direct Link  http://www.freescale.com
Logo FREESCALE - Freescale Semiconductor, Inc

MPXD2005VLU80R Datasheet(HTML) 19 Page - Freescale Semiconductor, Inc

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Overview
PXD20 Microcontroller Data Sheet, Rev. 2
Preliminary—Subject to Change Without Notice
Freescale Semiconductor
19
— Data buffers with 4-byte receive, 4-byte transmit
— Configurable word length (8-bit or 9-bit words)
— Error detection and flagging
–
Parity, noise and framing errors
— Interrupt driven operation with 4 interrupts sources
— Separate transmitter and receiver CPU interrupt sources
— 16-bit programmable baud-rate modulus counter and 16-bit fractional
— 2 receiver wake-up methods
•
LIN features:
— Autonomous LIN frame handling
— Message buffer to store identifier and up to eight data bytes
— Supports message length of up to 64 bytes
— Detection and flagging of LIN errors
— Sync field; Delimiter; ID parity; Bit, Framing; Checksum and Timeout errors
— Classic or extended checksum calculation
— Configurable Break duration of up to 36-bit times
— Programmable Baud rate prescalers (13-bit mantissa, 4-bit fractional)
— Diagnostic features
–
Loop back
–Self Test
–
LIN bus stuck dominant detection
— Interrupt driven operation with 16 interrupt sources
— LIN slave mode features
–
Autonomous LIN header handling
–
Autonomous LIN response handling
–
Discarding of irrelevant LIN responses using up to 16 ID filters
1.4.25
Inter-Integrated Circuit (I2C) controller modules
The PXD20 includes four I2C modules. Each module features the following:
•
Two-wire bi-directional serial bus for on-board communications
•
Compatibility with I2C bus standard
•
Multi-master operation
•
Software-programmable for one of 256 different serial clock frequencies
•
Software-selectable acknowledge bit
•
Interrupt-driven, byte-by-byte data transfer
•
Arbitration-lost interrupt with automatic mode switching from master to slave
•
Calling address identification interrupt
•
Start and stop signal generation/detection
•
Repeated START signal generation
•
Acknowledge bit generation/detection
•
Bus-busy detection



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