M68ICS08GR datasheet(217/408 Pages) FREESCALE

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Input/Output Ports (I/O)

Port C

MC68HC908GR8 — Rev 4.0

Technical Data

MOTOROLA

Input/Output Ports (I/O)

217

16.5.2 Data Direction Register C

Data direction register C (DDRC) determines whether each port C pin is

an input or an output. Writing a logic 1 to a DDRC bit enables the output

buffer for the corresponding port C pin; a logic 0 disables the output

buffer.

DDRC1–DDRC0 — Data Direction Register C Bits

These read/write bits control port C data direction. Reset clears

DDRC1–DDRC0, configuring all port C pins as inputs.

1 = Corresponding port C pin configured as output

0 = Corresponding port C pin configured as input

NOTE:

Avoid glitches on port C pins by writing to the port C data register before

changing data direction register C bits from 0 to 1.

Figure 16-11 shows the port C I/O logic.

NOTE:

For those devices packaged in a 28-pin DIP and SOIC package, PTC1,0

are not connected. Set DDRC1,0 to a 1 to configure PTC1,0 as outputs.

Address:

$0006

Bit 7

654321

Bit 0

Read:

000000

DDRC1

DDRC0

Write:

Reset:

00000000

= Unimplemented

Figure 16-10. Data Direction Register C (DDRC)

Freescale Semiconductor, Inc.

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M68ICS08GR Datasheet(PDF) 217 Page - Freescale Semiconductor, Inc