M68ICS08GR datasheet(215/408 Pages) FREESCALE

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Input/Output Ports (I/O)

Port B

MC68HC908GR8 — Rev 4.0

Technical Data

MOTOROLA

Input/Output Ports (I/O)

215

Figure 16-8. Port B I/O Circuit

When bit DDRBx is a logic 1, reading address $0001 reads the PTBx

data latch. When bit DDRBx is a logic 0, reading address $0001 reads

the voltage level on the pin. The data latch can always be written,

regardless of the state of its data direction bit. Table 16-3 summarizes

the operation of the port B pins.

READ DDRB ($0005)

WRITE DDRB ($0005)

RESET

WRITE PTB ($0001)

READ PTB ($0001)

PTBx

DDRBx

PTBx

Table 16-3. Port B Pin Functions

DDRB Bit

PTB Bit

I/O Pin Mode

Accesses

to DDRB

Accesses to PTB

Read/Write

Read

Write

X(1)

Input, Hi-Z(2)

DDRB5–DDRB0

PTB5–PTB0(3)

Output

DDRB5–DDRB0

PTB5–PTB0

Notes:

1. X = Don’t care

2. Hi-Z = High impedance

3. Writing affects data register, but does not affect input.

Freescale Semiconductor, Inc.

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