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M68ICS08GR Datasheet(PDF) 212 Page - Freescale Semiconductor, Inc |
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M68ICS08GR Datasheet(HTML) 212 Page - Freescale Semiconductor, Inc |
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212 / 408 page ![]() Input/Output Ports (I/O) Technical Data MC68HC908GR8 — Rev 4.0 212 Input/Output Ports (I/O) MOTOROLA 16.3.3 Port A Input Pullup Enable Register The port A input pullup enable register (PTAPUE) contains a software configurable pullup device for each of the four port A pins. Each bit is individually configurable and requires that the data direction register, DDRA, bit be configured as an input. Each pullup is automatically and dynamically disabled when a port bit’s DDRA is configured for output mode. PTAPUE3–PTAPUE0 — Port A Input Pullup Enable Bits These writeable bits are software programmable to enable pullup devices on an input port bit. 1 = Corresponding port A pin configured to have internal pullup 0 = Corresponding port A pin has internal pullup disconnected Address: $000D Bit 7 654321 Bit 0 Read: 0000 PTAPUE3 PTAPUE2 PTAPUE1 PTAPUE0 Write: Reset: 00000000 Figure 16-5. Port A Input Pullup Enable Register (PTAPUE) Freescale Semiconductor, Inc. For More Information On This Product, Go to: www.freescale.com |
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