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PSD813F2 Datasheet(PDF) 83 Page - STMicroelectronics

Part # PSD813F2
Description  Flash in-system programmable (ISP) peripherals
PDF  128 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

PSD813F2 Datasheet(HTML) 83 Page - STMicroelectronics

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PSD8XXFX
Power management
Doc ID 7833 Rev 7
83/128
Bit 4
PLD Array clk
0 =
on
CLKIN (PD1) input to the PLD AND Array is connected. Every change of CLKIN
(PD1) Powers-up the PLD when Turbo Bit is ’0.’
1 =
off
CLKIN (PD1) input to PLD AND Array is disconnected, saving power.
Bit 5
PLD MCell clk
0 =
on
CLKIN (PD1) input to the PLD macrocells is connected.
1 =
off
CLKIN (PD1) input to PLD macrocells is disconnected, saving power.
Bit 6
X
0
Not used, and should be set to zero.
Bit 7
X
0
Not used, and should be set to zero.
1.
The bits of this register are cleared to zero following Power-up. Subsequent Reset (RESET) pulses do not clear the
registers.
Table 32.
Power Management mode registers PMMR2(1)
Bit
Name
Description
Bit 0
X
0
Not used, and should be set to zero.
Bit 1
X
0
Not used, and should be set to zero.
Bit 2
PLD Array
CNTL0
0 = on
Cntl0 input to the PLD AND Array is connected.
1 = off
Cntl0 input to PLD AND Array is disconnected, saving power.
Bit 3
PLD Array
CNTL1
0 = on
Cntl1 input to the PLD AND Array is connected.
1 = off
Cntl1 input to PLD AND Array is disconnected, saving power.
Bit 4
PLD Array
CNTL2
0 = on
Cntl2 input to the PLD AND Array is connected.
1 = off
Cntl2 input to PLD AND Array is disconnected, saving power.
Bit 5
PLD Array
ALE
0 = on
ALE input to the PLD AND Array is connected.
1 = off
ALE input to PLD AND Array is disconnected, saving power.
Bit 6
PLD Array
DBE
0 = on
DBE input to the PLD AND Array is connected.
1 = off
DBE input to PLD AND Array is disconnected, saving power.
Bit 7
X
0
Not used, and should be set to zero.
1.
The bits of this register are cleared to zero following Power-up. Subsequent Reset (RESET) pulses do not clear the
registers.
Table 31.
Power Management mode registers PMMR0(1) (continued)
Bit
Name
Description
Obsolete
Product(s)
- Obsolete
Product(s)



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