PSD813F2 datasheet(36/128 Pages) STMICROELECTRONICS

36 / 128 page

Programming Flash memory

PSD8XXFX

36/128

Doc ID 7833 Rev 7

any location within the sector being erased to get the Toggle flag bit (DQ6) and the Error flag

bit (DQ5).

PSDsoft Express generates ANSI C code functions which implement these Data Toggling

algorithms.

8.3

Unlock Bypass (PSD833F2x, PSD834F2x, PSD853F2x,

PSD854F2x)

The Unlock Bypass instructions allow the system to program bytes to the Flash memories

faster than using the standard Program instruction. The Unlock Bypass mode is entered by

first initiating two Unlock cycles. This is followed by a third WRITE cycle containing the

Unlock Bypass code, 20h (as shown in Table 10).

The Flash memory then enters the Unlock Bypass mode. A two-cycle Unlock Bypass

Program instruction is all that is required to program in this mode. The first cycle in this

instruction contains the Unlock Bypass Program code, A0h. The second cycle contains the

program address and data. Additional data is programmed in the same manner. These

instructions dispense with the initial two Unlock cycles required in the standard Program

instruction, resulting in faster total Flash memory programming.

During the Unlock Bypass mode, only the Unlock Bypass Program and Unlock Bypass

Reset Flash instructions are valid.

To exit the Unlock Bypass mode, the system must issue the two-cycle Unlock Bypass Reset

Flash instruction. The first cycle must contain the data 90h; the second cycle the data 00h.

Addresses are Don’t Care for both cycles. The Flash memory then returns to READ mode.

Obsolete

Product(s)

- Obsolete

Product(s)

PSD813F2 Datasheet(PDF) 36 Page - STMicroelectronics