IO96NDB2V1 datasheet(108/242 Pages) MICROSEMI

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ProASIC3L DC and Switching Characteristics

2-92

Revision 13

HSTL Class II

High-Speed Transceiver Logic is a general-purpose high-speed 1.5 V bus standard (EIA/JESD8-6).

ProASIC3E devices support Class II. This provides a differential amplifier input buffer and a push-pull

output buffer.

Table 2-154 • Minimum and Maximum DC Input and Output Levels

HSTL Class II

VIL

VIH

VOL

VOH

IOL IOH IOSL

IOSH

IIL IIH

Drive

Strength

Min.

Max.

Min.

Max.

Min.

VmA mA

Max.

mA1

Max.

mA1

µA2 µA2

15 mA3

–0.3 VREF – 0.1 VREF + 0.1 1.575

0.4

VCCI – 0.4 15 15

10 10

Notes:

1. Currents are measured at 100°C junction temperature and maximum voltage.

2. Currents are measured at 85°C junction temperature.

3. Output drive strength is below JEDEC specification.

Figure 2-18 • AC Loading

Table 2-155 • AC Waveforms, Measuring Points, and Capacitive Loads

Input Low (V)

Input High (V)

Measuring

Point* (V)

VREF (typ.) (V)

VTT (typ.) (V)

CLOAD (pF)

VREF – 0.1

VREF + 0.1

0.75

Note: *Measuring point = Vtrip. See Table 2-16 on page 2-12 for a complete table of trip points.

Test Point

20 pF

HSTL

Class II

VTT

IO96NDB2V1 Datasheet(PDF) 108 Page - Microsemi Corporation

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