IO96NDB2V1 datasheet(110/242 Pages) MICROSEMI

Part #	IO96NDB2V1

Description	ProASIC3L Low Power Flash FPGAs with Flash*Freeze Technology

PDF	242 Pages

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Manufacturer	MICROSEMI [Microsemi Corporation]

Direct Link	http://www.microsemi.com

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ProASIC3L DC and Switching Characteristics

2-94

Revision 13

SSTL2 Class I

Stub-Speed Terminated Logic for 2.5 V memory bus standard (JESD8-9). ProASIC3E devices support

Class I. This provides a differential amplifier input buffer and a push-pull output buffer.

Table 2-158 • Minimum and Maximum DC Input and Output Levels

SSTL2 Class I

VIL

VIH

VOL

VOH

IOL IOH IOSL

IOSH

IIL IIH

Drive

Strength

Min.

Max.

Min.

Max.

Min.

VmA mA

Max.

mA1

Max.

mA1

µA2 µA2

15 mA

–0.3 VREF – 0.2 VREF + 0.2

2.7

0.54

VCCI – 0.62 15 15

10 10

Notes:

1. Currents are measured at 100°C junction temperature and maximum voltage.

2. Currents are measured at 85°C junction temperature.

Figure 2-19 • AC Loading

Table 2-159 • AC Waveforms, Measuring Points, and Capacitive Loads

Input Low (V)

Input High (V)

Measuring

Point* (V)

VREF (typ.) (V)

VTT (typ.) (V)

CLOAD (pF)

VREF – 0.2

VREF + 0.2

1.25

Note: *Measuring point = Vtrip. See Table 2-16 on page 2-12 for a complete table of trip points.

Test Point

30 pF

SSTL2

Class I

VTT

IO96NDB2V1 Datasheet(PDF) 110 Page - Microsemi Corporation

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