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IO96NDB2V1 Datasheet(PDF) 140 Page - Microsemi Corporation |
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IO96NDB2V1 Datasheet(HTML) 140 Page - Microsemi Corporation |
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140 / 242 page ![]() ProASIC3L DC and Switching Characteristics 2-124 Revision 13 VersaTile Specifications as a Sequential Module The ProASIC3 library offers a wide variety of sequential cells, including flip-flops and latches. Each has a data input and optional enable, clear, or preset. In this section, timing characteristics are presented for a representative sample from the library. For more details, refer to the IGLOO, Fusion, and ProASIC3 Macro Library Guide. Figure 2-37 • Sample of Sequential Cells Figure 2-38 • Timing Model and Waveforms DQ DFN1 Data CLK Out D Q DFN1C1 Data CLK Out CLR DQ DFI1E1P1 Data CLK Out En PRE D Q DFN1E1 Data CLK Out En PRE CLR Out CLK Data EN tSUE 50% 50% tSUD tHD 50% 50% tCLKQ 0 tHE tRECPRE tREMPRE tRECCLR tREMCLR tWCLR tWPRE tPRE2Q tCLR2Q tCKMPWH tCKMPWL 50% 50% 50% 50% 50% 50% 50% 50% 50% 50% 50% 50% 50% 50% 50% |
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