AT25DF641_13 datasheet(22/56 Pages) ETC2

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AT25DF641

3680F–DFLASH–4/10

8.2.

Write Disable

The Write Disable command is used to reset the Write Enable Latch (WEL) bit in the Status Register to the logical

"0" state. With the WEL bit reset, all Byte/Page Program, erase, Protect Sector, Unprotect Sector, Sector

Lockdown, Freeze Sector Lockdown State, Program OTP Security Register, and W rite Status Register

commands will not be executed. Other conditions can also cause the WEL bit to be reset; for more details, refer to

the WEL bit section of the Status Register description.

To issue the Write Disable command, the

pin must first be asserted and the opcode of 04h must be clocked

into the device. No address bytes need to be clocked into the device, and any data clocked in after the opcode

will be ignored. When the

pin is deasserted, the WEL bit in the Status Register will be reset to a logical “0”.

The complete opcode must be clocked into the device before the

pin is deasserted, and the

pin must be

deasserted on an even byte boundary (multiples of eight bits); otherwise, the device will abort the operation and

the state of the WEL bit will not change.

Figure 8-2.

Write Disable

SCK

MS B

OP C ODE

HIG H-IMP E DANC E

8.3.

Protect Sector

Every physical 64-Kbyte sector of the device has a corresponding single-bit Sector Protection Register that is

used to control the software protection of a sector. Upon device power-up, each Sector Protection Register will

default to the logical “1” state indicating that all sectors are protected and cannot be programmed or erased.

Issuing the Protect Sector command to a particular sector address will set the corresponding Sector Protection

Table 8-1.

Sector Protection Register Values

Value

Sector Protection Status

Sector is unprotected and can be programmed and erased

Sector is protected and cannot be programmed or erased

This is the default state

AT25DF641 Datasheet(PDF) 22 Page - List of Unclassifed Manufacturers