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AN2653 Datasheet(PDF) 8 Page - STMicroelectronics

Part # AN2653
Description  Operational amplifier stability compensation methods
PDF  22 Pages
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Manufacturer  STMICROELECTRONICS [STMicroelectronics]
Direct Link  http://www.st.com
Logo STMICROELECTRONICS - STMicroelectronics

AN2653 Datasheet(HTML) 8 Page - STMicroelectronics

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Out-of-the-loop compensation method
AN2653
8/22
3
Out-of-the-loop compensation method
3.1
Theoretical overview
A simple compensation method, using only one extra component, consists in adding a
resistor in series between the output of the amplifier and its load (see Figure 13). It is often
referred to as the out-of-the-loop compensation method because the additional component
(ROL) is added outside of the feedback loop. The resistor isolates the op-amp feedback
network from the capacitive load.
From Figure 14, the loop gain with this compensation method is:
This compensation introduces a zero in the loop gain, just after the pole caused by the
capacitive load, at:
This pole is also unfortunately shifted to lower frequencies at:
However, due to the zero, the effect of the pole is minimized and the stability is improved. To
obtain a good level of stability, ROL must be chosen such that the frequency of the zero
occurs at least one decade before unity-gain frequency. It then allows a significant shift of
the phase and therefore increase phase and gain margins.
The previous equation shows that if ROL >> Zo, then -Vr/Vs= A(ω ), and the circuit is stable.
In that case, pole and zero occur at the same frequency. However, the value of ROL is limited
by the load impedance, ROL and RL acting as a a divider bridge from the operational
amplifier output. Therefore, in order to minimize the error on Vout, ROL must be very small
compared to RL (for example, a maximum of 1%, but this criterion depends on the required
accuracy).
Finally, this compensation method is effective, but the drawback is a limitation on the
accuracy of Vout depending on the resistive load value.
Figure 13.
Out-of-the-loop compensation
schematics
Figure 14.
Out-of-the-loop equivalent
schematics for loop gain
calculation
V
r
V
s
------
–
A
ω
()
1
R
OL
R
L
-----------
jR
OLCLω
++
⎝⎠
⎛⎞
⋅
1
R
OL
Z
o
+
R
L
------------------------
jZ
o
R
OL
+
()C
Lω
++
---------------------------------------------------------------------------------
=
1
2
π R
OL
⋅
R
LCL
||
------------------------------------------------
1
2
π
Z
o
R
OL
+
()
⋅
R
LCL
||
------------------------------------------------------------------



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