AN2836 datasheet(10/57 Pages) STMICROELECTRONICS

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Designing an application with L6225, L6226, L6227

AN2836

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Doc ID 15084 Rev 1

Designing an application with L6225, L6226, L6227

4.1

Current ratings

With MOSFET (DMOS) devices, unlike bipolar transistors, current under short-circuit

conditions is, at first approximation, limited by the RDS(on) of the DMOS themselves and

could reach very high values. L6225, L6226, L6227 OUT pins and the two VSA and VSB pins

are rated for a maximum of 1.4 Arms and 2.8 A peak (typical values), corresponding to a

total (for the whole IC) 2.8 Arms (5.6 A peak). These values are meant to avoid damaging

metal structures, including the metallization on the die and bond wires. In practical

applications, though, maximum allowable current is less than these values, due to power

dissipation limits (see Section 4.16). The devices have a built-in overcurrent detection

(OCD) that provides protection against short circuits between the outputs and between an

output and ground (see Section 4.13).

4.2

Voltage ratings and operating range

The L6225, L6226, L6227 require a single supply voltage (VS), for the motor supply. Internal

voltage regulators provide the 5 V and 10 V required for the internal circuitry. The operating

range for VS is 8 to 52 V. To prevent working from an undesirable low supply voltage an

undervoltage lockout (UVLO) circuit shuts down the device when the supply voltage falls

below 5.5 V. To resume normal operating conditions, VS must then exceed 6.3 V. The

hysteresis is provided to avoid false intervention of the UVLO function during fast VS

ringings. It should be noted, however, that RDS(on) of the DMOS is a function of the VS

supply voltage. Actually, when VS is less than 10 V, RDS(on) is adversely affected, and this is

particularly true for the high-side DMOS that are driven from VBOOT supply. This supply is

obtained through a charge pump from the internal 10 V supply, which tends to reduce its

output voltage when VS goes below 10 V. Figure 4 shows the supply voltage of the high-side

gate drivers (VBOOT - VS) versus the supply voltage (VS).

Figure 4.

Supply voltage of high-side gate drivers versus supply voltage

Note that VS must be connected to both VSA and VSB since the bootstrap voltage (at VBOOT

pin) is the same for the two H-bridges. The integrated DMOS have a rated drain-source

breakdown voltage of 60 V. However VS should be kept below 52 V, since in normal working

conditions the DMOS see a Vds voltage that exceeds VS supply. In particular, during a

phase change (when each output of the same H-bridge switches from VS to GND or vice

versa, for example to reverse the current in the load) at the beginning of the deadtime (when

all the DMOS are off) the SENSE pin sees a negative spike due to a non-negligible parasitic

AN2836 Datasheet(PDF) 10 Page - STMicroelectronics