AN3393 datasheet(99/103 Pages) STMICROELECTRONICS

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AN3393

First-in first-out (FIFO) buffer

103

10.4

Watermark

The watermark is a configurable flag that can be used to generate a specific interrupt in

order to know when the FIFO buffer contains at least the number of samples defined as the

watermark level. The user can select the desired level in a range from 0 to 31 using the

WTMP[4:0] field in the FIFO control register while the FIFO source register FSS[4:0] is

related to the number of samples in the FIFO. If FSS[4:0] is greater than WTMP[4:0], the

WTM bit is set high in the FIFO source register; on the contrary, WTM is driven low when the

FSS[4:0] field becomes lower than WTMP[4:0]. FSS[4:0] increases by one step at the ODR

frequency and decreases by one step every time that a read of the sample set is performed

by the user.

FIFO depth can be limited to the watermark value by setting the WTM_EN bit to “1” in

CTRL_REG6 register (25h). When this feature is activated both WTM and OVERRUN flags

in the FIFO_SRC register have the same behavior.

Figure 36. Watermark behavior - WTMP[4:0] = 10

In Figure 36, the first row indicates the FSS[4:0] value, the second row indicates the relative

FIFO slot and the last row shows the incremental FIFO data. Assuming WTMP[4:0] = 10,

the WTM flag changes from “0” to “1” when the eleventh FIFO slot is filled (F10). If the

output registers are read, the WTM flag goes low when the value of the FSS[4:0] bits is

lower than WTMP[4:0].

The watermark flag (WTM) can be enabled to generate a dedicated interrupt on the INT1

pin by setting the P1_WTM bit high in CTRL_REG6 (25h).

10.5

Retrieving data from FIFO

When FIFO is enabled and the mode is different from Bypass, reading the output registers

(28h to 2Dh) returns the oldest FIFO sample set.

Note:

To correctly retrieve data from the FIFO, the BDU bit in CTRL_REG4 (20h) register must be

set to “0”.

Synchronous reading on the interrupt pin is required. Either the overrun or the watermark

interrupt must be set through P1_OVERRUN and P1_WTM bits in CTRL_REG6 (25h). The

recommended reading procedure to avoid data loss or duplicated data reading depends on

the FIFO configuration:

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