AN4488 datasheet(14/44 Pages) STMICROELECTRONICS

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Power supplies

AN4488

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DocID026304 Rev 3

2.3.5

NRST circuitry example (for STM32F411xx and STM32F446xx only)

This example applies to STM32F411xx and STM32F446xx where PDR_ON can be

connected to VSS to permanently disable internal reset circuitry.

Restrictions:

•

PDR_ON = 0 is mostly intended for VDD supply between 1.7 V and 1.9V (i.e. 1.8V +/-

5% supply).

Supply ranges which never go below 1.8V minimum should be better managed by

internal circuitry (no additional component needed, thanks to fully embedded reset

controller).

•

When the internal reset is OFF, the following integrated features are no longer

supported:

–

The integrated power-on reset (POR) / power-down reset (PDR) circuitry is

disabled.

–

The brownout reset (BOR) circuitry must be disabled.

–

The embedded programmable voltage detector (PVD) is disabled.

–

VBAT functionality is no more available and VBAT pin should be connected to

VDD.

Figure 7. NRST circuitry example

(only for STM32F411xx and STM32F446xx)

Even with PDR_ON=0, during power up, the NRST is driven low by internal Reset controller

during TRSTTEMPO in order to allow stabilization of internal analog circuitry. Refer to

STM32F4xxxx datasheets for actual timing value.

AN4488 Datasheet(PDF) 14 Page - STMicroelectronics