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PI7C7300D Datasheet(PDF) 99 Page - Pericom Semiconductor Corporation |
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PI7C7300D Datasheet(HTML) 99 Page - Pericom Semiconductor Corporation |
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99 / 107 page ![]() PI7C7300D 3-PORT PCI-TO-PCI BRIDGE Page 99 of 107 Pericom Semiconductor November 2005 - Revision 1.01 Upon activation of the TRST# reset pin, the latched instruction asynchronously changes to the id code instruction. When the TAP controller moves into the test state other than by reset activation, the opcode changes as TDI shifts, and becomes active on the falling edge of TCK. 16.2 BOUNDARY-SCAN INSTRUCTION SET The PI7C7300D supports three mandatory boundary-scan instructions (bypass, sample/preload and extest). The table shown below lists the PI7C7300D’s boundary-scan instruction codes. The “reserved” code should not be used. Instruction Code (binary) Instruction Name Instruction Code (binary) Instruction Name 0000 EXTEST 0101 Reserved 0001 SAMPLE/PRELOAD 1111 Bypass Table 16-1 TAP PINS Instruction / Requisite Opcode (binary) Description Extest IEEE 1149.1 Required 0000 Extest initiates testing of external circuitry, typically board-level interconnects and off chip circuitry. Extest connects the boundary-scan register between TDI and TDO. When Extest is selected, all output signal pin values are driven by values shifted into the boundary-scan register and may change only of the falling edge of TCK. Also, when extest is selected, all system input pin states must be loaded into the boundary-scan register on the rising-edge of TCK. Sample/preload IEEE 1149.1 Required 0001 Sample/preload performs two functions: 1. A snapshot of the sample instruction is captured on the rising edge of TCK without interfering with normal operation. The instruction causes boundary-scan register cells associated with outputs to sample the value being driven. 2. On the falling edge of TCK, the data held in the boundary-scan cells is transferred to the slave register cells. Typically, the slave latched data is applied to the system outputs via the extest instruction. Idcode IEEE 1149.1 Required 0101 Reserved Bypass IEEE 1149.1 Required 1111 Bypass instruction selects the one-bit bypass register between TDI and TDO pins. 0 (binary) is the only instruction that accesses the bypass register. While this instruction is in effect, all other test data registers have no effect on system operation. Test data registers with both test and system functionality perform their system functions when this instruction is selected. 16.3 TAP TEST DATA REGISTERS The PI7C7300D contains two test data registers (bypass and boundary-scan). Each test data register selected by the TAP controller is connected serially between TDI and TDO. TDI is connected to the test data register’s most significant bit. TDO is connected to the least significant bit. Data is shifted one bit position within the register towards TDO on |
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