PI7C7300DNA datasheet(17/107 Pages) PERICOM

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PI7C7300D

3-PORT PCI-TO-PCI BRIDGE

Page 17 of 107

Pericom Semiconductor

November 2005 - Revision 1.01

Name

Pin #

Type

Description

S_CFN#

PIU

Secondary Bus Central Function Control Pin. When

tied LOW, it enables the internal arbiter. When tied

HIGH, an external arbiter must be used. S1_REQ#[0]

or S2_REQ#[0] is reconfigured to be the secondary bus

grant input, and S1_GNT#[0] or S2_GNT#[0] is

reconfigured to be the secondary bus request output.

3.4

CLOCK SIGNALS

Name

Pin #

Type

Description

P_CLK

Primary Clock Input. Provides timing for all

transactions on the primary interface.

S1_CLKOUT

[7:0]

A11, C12, A13,

B14, B15, C16,

A18, A19

PTS

Secondary Clock Output. Provides secondary 1

clocks phase synchronous with the P_CLK.

S2_CLKOUT

[7:0]

T3, T1, P3, N3,

M4, L3, L2, J1

PTS

Secondary Clock Output. Provides secondary 2

clocks phase synchronous with the P_CLK.

3.5

MISCELLANEOUS SIGNALS

Name

Pin #

Type

Description

BY_PASS

Reserved. Reserved for future use. Must be tied

HIGH.

PLL_TM

Reserved. Reserved for future use. Must be tied

LOW.

S_CLKIN

Reserved. Reserved for future use. Must be tied

LOW.

SCAN_TM#

Full-Scan Test Mode Enable (Active LOW).

Connect HIGH for normal operation.

When SCAN_TM# is active, the ten scan chains will be

enabled. The scan clock is P_CLK. The scan input and

outputs are as follows:

S1_REQ[6], S1_REQ[5], S1_REQ[4], S1_REQ[3],

S1_REQ[2], S2_REQ#[6], S2_REQ#[5], S2_REQ#[4],

S2_REQ#[3], S2_REQ#[2], and S1_GNT#[6],

S1_GNT#[5], S1_GNT#[4], S1_GNT#[3],

S1_GNT#[2], S2_GNT#[6], S2_GNT#[5],

S2_GNT#[4], S2_GNT#[3], S2_GNT#[2]

SCAN_EN

PID

Full-Scan Enable Control. SCAN_EN should be tied

LOW in normal mode. When SCAN_EN is LOW, full-

scan is in shift operation if SCAN_TM# is active.

When SCAN_EN is HIGH, full-scan is in parallel

operation if SCAN_TM# is active.

3.6

COMPACT PCI HOT-SWAP SIGNALS

Name

Pin #

Type

Description

LOO

Hot Swap LED. The output of this pin lights a blue

LED to indicate insertion and removal ready status. If

HS_EN is LOW, pin is S2_GNT#[7].

HS_SW#

Hot Swap Switch. When driven LOW, this signal

indicates that the board ejector handle indicates an

insertion or impending extraction of a board. If HS_EN

is LOW, pin is S2_REQ#[7].

PI7C7300DNA Datasheet(PDF) 17 Page - Pericom Semiconductor Corporation

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