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TMS320C6472ECTZ Datasheet(PDF) 259 Page - Texas Instruments |
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TMS320C6472ECTZ Datasheet(HTML) 259 Page - Texas Instruments |
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259 / 269 page  GPIx 2 1 TMS320C6472 www.ti.com SPRS612G – JUNE 2009 – REVISED JULY 2011 7.19 General-Purpose Input/Output (GPIO) 7.19.1 GPIO Device-Specific Information On the C6472 device, the GPIO peripheral pins are muxed with configuration inputs that are captured at device reset. For more detailed information on device/peripheral configuration and the C6472 device pin muxing, see Section 3, Device Configuration. 7.19.2 GPIO Peripheral Register Descriptions Table 7-151. GPIO Registers HEX ADDRESS RANGE ACRONYM REGISTER NAME 02B0 0000 GPIOPID GPIO Peripheral ID Register 02B0 0004 GPIOEMU GPIO Emulation Control Register 02B0 0008 BINTEN GPIO Interrupt Per Bank Enable Register 02B0 000C - Reserved 02B0 0010 DIR GPIO Direction Register 02B0 0014 OUT_DATA GPIO Output Data register 02B0 0018 SET_DATA GPIO Set Data register 02B0 001C CLR_DATA GPIO Clear Data Register 02B0 0020 IN_DATA GPIO Input Data Register 02B0 0024 SET_RIS_TRIG GPIO Set Rising Edge Interrupt Register 02B0 0028 CLR_RIS_TRIG GPIO Clear Rising Edge Interrupt Register 02B0 002C SET_FAL_TRIG GPIO Set Falling Edge Interrupt Register 02B0 0030 CLR_FAL_TRIG GPIO Clear Falling Edge Interrupt Register 02B0 008C - 02B0 3FFC - Reserved 7.19.3 GPIO Electrical Data/Timing Table 7-152. Timing Requirements for General-Purpose Input(1) (see Figure 7-65) 500/625/700 NO. UNIT MIN MAX 1 tw(GPIH) Pulse duration, GPIx high 12P ns 2 tw(GPIL) Pulse duration, GPIx low 12P ns (1) P = 1/CPU clock frequency in ns. Figure 7-65. General-Purpose Input Port Timing Copyright © 2009–2011, Texas Instruments Incorporated C64x+ Peripheral Information and Electrical Specifications 259 Submit Documentation Feedback Product Folder Link(s) :TMS320C6472 |
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