ADC08D1000EVAL datasheet(28/31 Pages) NSC

28 / 31 page

2.0 Applications Information

(Continued)

IN− positive with respect to VIN+ will produce an output

code of all zeros and when V

IN+ and VIN− are equal, the

output code will vary between codes 127 and 128.

2.6 POWER CONSIDERATIONS

A/D converters draw sufficient transient current to corrupt

their own power supplies if not adequately bypassed. A 33

µF capacitor should be placed within an inch (2.5 cm) of the

A/D converter power pins. A 0.1 µF capacitor should be

placed as close as possible to each V

A pin, preferably within

one-half centimeter. Leadless chip capacitors are preferred

because they have low lead inductance.

The V

A and VDR supply pins should be isolated from each

other to prevent any digital noise from being coupled into the

analog portions of the ADC. A ferrite choke, such as the JW

Miller FB20009-3B, is recommended between these supply

lines when a common source is used for them.

As is the case with all high speed converters, the

ADC08D1000 should be assumed to have little power supply

noise rejection. Any power supply used for digital circuitry in

a syatem where a lot of digital power is being consumed

should not be used to supply power to the ADC08D1000.

The ADC supplies should be the same supply used for other

analog circuitry, if not a dedicated supply.

2.6.1 Supply Voltage

The ADC08D1000 is specified to operate with a supply

voltage of 1.9V ±0.1V. It is very important to note that, while

this device will function with slightly higher supply voltages,

these higher supply voltages may reduce product lifetime.

No pin should ever have a voltage on it that is in excess of

the supply voltage or below ground by more than 150 mV,

not even on a transient basis. This can be a problem upon

application of power and power shut-down. Be sure that the

supplies to circuits driving any of the input pins, analog or

digital, do not come up any faster than does the voltage at

the ADC08D1000 power pins.

The Absolute Maximum Ratings should be strictly observed,

even during power up and power down. A power supply that

produces a voltage spike at turn-on and/or turn-off of power

can destroy the ADC08D1000. The circuit of Figure 13 will

provide supply overshoot protection.

Many linear regulators will produce output spiking at

power-on unless there is a minimum load provided. Active

devices draw very little current until their supply voltages

reach a few hundred millivolts. The result can be a turn-on

spike that can destroy the ADC08D1000, unless a minimum

load is provided for the supply. The 100

Ω resistor at the

regulator output provides a minimum output current during

power-up to ensure there is no turn-on spiking.

In the circuit of Figure 13, an LM317 linear regulator is

satisfactory if its input supply voltage is 4V to 5V . If a 3.3V

supply is used, an LM1086 linear regulator is recommended.

The output drivers should have a supply voltage, V

DR, that is

within the range specified in the Operating Ratings table.

This voltage should not exceed the V

A supply voltage.

If the power is applied to the device without an input clock

signal present, the current drawn by the device might be

below 200 mA. This is because the ADC08D1000 gets reset

through clocked logic and its initial state is random. If the

reset logic comes up in the "on" state, it will cause most of

the analog circuitry to be powered down, resulting in less

than 100 mA of current draw. This current is greater than the

power down current because not all of the ADC is powered

down. The device current will be normal after the input clock

is established.

2.6.2 Thermal Management

The ADC08D1000 is capable of impressive speeds and

performance at very low power levels for its speed. However,

the power consumption is still high enough to require atten-

tion to thermal management. For reliability reasons, the die

temperature should be kept to a maximum of 130˚C. That is,

(ambient temperature) plus ADC power consumption

times

JA (junction to ambient thermal resistance) should not

exceed 130˚C. This is not a problem if the ambient tempera-

ture is kept to a maximum of +85˚C with the requisite amount

of airflow as specified in the Operating Ratings section.

Please note that the following are general recommendations

for mounting exposed pad devices onto a PCB. This should

be considered the starting point in PCB and assembly pro-

cess development. It is recommended that the process be

developed based upon past experience in package mount-

ing.

The package of the ADC08D1000 has an exposed pad on its

back that provides the primary heat removal path as well as

excellent electrical grounding to the printed circuit board.

The land pattern design for lead attachment to the PCB

should be the same as for a conventional LQFP, but the

exposed pad must be attached to the board to remove the

maximum amount of heat from the package, as well as to

ensure best product parametric performance.

To maximize the removal of heat from the package, a ther-

mal land pattern must be incorporated on the PC board

within the footprint of the package. The exposed pad of the

device must be soldered down to ensure adequate heat

conduction out of the package. The land pattern for this

exposed pad should be at least as large as the5x5mmof

the exposed pad of the package and be located such that the

exposed pad of the device is entirely over that thermal land

pattern. This thermal land pattern should be electrically con-

nected to ground. A clearance of at least 0.5 mm should

separate this land pattern from the mounting pads for the

package pins.

20097454

FIGURE 13. Non-Spiking Power Supply

ADC08D1000EVAL Datasheet(PDF) 28 Page - National Semiconductor (TI)

ADC08D1000EVAL Datasheet(HTML) 28 Page - National Semiconductor (TI)

Html Pages

1 2 3 4 5 6 7 8 9 10 11 12 13 14 15 16 17 18 19 20 21 22 23 24 25 26 27 28 29 30 31

Datasheet Download

Link URL