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MPC823 Datasheet(PDF) 45 Page - Motorola, Inc |
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MPC823 Datasheet(HTML) 45 Page - Motorola, Inc |
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45 / 74 page ![]() Communication Processor Module MOTOROLA MPC823 REFERENCE MANUAL 16-423 To use the SMCx GCI channels properly, the time-slot assigner in the serial interface must be configured to route the monitor and circuit interface channels to the serial management controller you prefer. Refer to Section 16.7 The Serial Interface with Time-Slot Assigner for more details on how to program this configuration. A serial management controller in GCI mode is also referred to as the SMCx GCI controller. 16.11.8.0.1 SMCx GCI Monitor Channel Transmission Process. The monitor channel 0 is used to exchange data with a layer 1 device (reading and writing internal registers and transferring the S and Q bits). Monitor channel 1 is used for programming and controlling voice/data modules, such as CODECs. The core writes the data byte into the transmit (TX) buffer descriptor. The serial management controller transmits the data on the monitor channel and handles the A and E control bits according to the GCI monitor channel protocol. You can issue the TIMEOUT command to solve deadlocks when errors in the A and E bit occur on the data line. 16.11.8.0.2 SMCx GCI Monitor Channel Reception Process. The serial management controller receives data and handles the A and E control bits according to the GCI monitor channel protocol. When the communication processor module stores a received data byte in the SMCx receive (RX) buffer descriptor, a maskable interrupt is generated. You can issue the TRANSMIT ABORT REQUEST command and the MPC823 transmits an abort request on the E bit. 16.11.8.1 HANDLING THE SMCx CIRCUIT INTERFACE CHANNEL. The circuit interface channel is used to control the layer 1 device. The layer 2 device in the TE sends commands and receives indication to or from the upstream layer 1 device via circuit interface channel 0. In the SCIT configuration, circuit interface channel 1 is used to convey real-time status information between the layer 2 device and nonlayer 1 peripheral devices (CODECs). 16.11.8.1.1 SMCx GCI Circuit Interface Channel Transmission Process. The core writes the data byte into the circuit interface TX buffer descriptor and the serial management controller transmits the data continuously on the circuit interface channel to the physical layer device. 16.11.8.1.2 SMCx GCI Circuit Interface Channel Reception Process. The SMCx receiver continuously monitors the circuit interface channel and when it recognizes a change in the data and this value is received in two successive frames, it is interpreted as valid data. This is referred to as the double last-look method. The received data byte is stored by the communication processor module in the circuit interface RX buffer descriptor and a maskable interrupt is generated. If the serial management controller is configured to support SCIT channel 1, the double last-look method is not used. |
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